AY-Track: MITCHELL / MITCHELL HOUSE / HWC
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(C) Valeriy Kovalev
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Hello, All!
To me there PRUSAK brought his new hardware gadgets, it
stands in his Pentagon 512, and so far no glitches ...
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Additional RAM
The essence of this devaysa is that
instead PZUshnyh BASIC 128 and TR DOS substituted RAM type
62256 (32K), which emulates the ROM. Thus, instead of boring
128 BASIC menus can put their own commander, or anything else,
as well as use their own versions DOS'a.
For example, I already got a collection DOS'ov.
To perform required:
a) Check the way to decrypt the keyboard port # FE. He should
be selected by A0 = 0 and A7 = 1. Otherwise, you must make a
revision on your computer. b) Need RAM 62256-1 unit,
1533LL1-2pcs, 1533LN1, 1533LI3, 1533IR23.
This scheme provides for machines with ROM
27512. Under other types of ROM alter the scheme is simple, but
results will not be. The scheme is shown in Figure 1
RAM 62256 (32K)
/ WR 1 O / WR
bit0 A14
O / CS
+ Up '/ RD O / OE
bit2
DOS
/ ROMCS
1
bit1 1 '
4bit ROM 27512
# 7FFD
22
Jan. 1 O / CS
DOS 1O
Figure 1
We now describe the principle of the scheme.
bit0, bit1, bit2 - it beats the port, which will be hung
this device (the port 126 or # 7E). Bit 0 enables / disables
write to RAM. Bit 1 enables / disables itself RAM. Bit 2 force
includes a RAM Bank, the corresponding DOS. This is necessary
in order to install DOS in RAM
could easily write it. RAM
off if is 48 BASIC. This
achieved by establishment of 4-bit port
# 7FFD the circuit device.
Now, on the implementation of Port # 7E. The port is on one
1533LL1 and 1533IR23. Scheme shown in Figure 2
1O bit0
D0 D0 RG Q0
D1 D1 Q1 1O bit1
D2 D2 Q2
D3 D3 Q3
D4 D4 Q4 1O bit2
D5 D5 Q5
D6 D6 Q6
D7 D7 Q7
/ C
A0 1 o / CS
A7
1
IORQ 1
WR
Figure 2
Inverters at the output of the register set
so that when the computer
completion has been disabled. Include any bit can be written to
it one. For example, installing DOS and BASIC assembler will
look like this:
DI
LD A,% 00000111; include forced
; DOS and rasreshenie records
And, the bit 1 can not
; Install.
OUT (126), A
LD HL, DOS_ADRES; at that address in memory
, Must be in DOS.
LD DE, 0
LD BC, 16384
LDIR
LD BC, # 7FFD
IN A, (C)
PUSH AF; keep the port # 7FFD
; (If you have not read, then
; SORRY).
LD A,% 00000000
OUT (C), A; set with a 128 ROM BASIC
, (Because when BASIC 48 additional
; Relatively RAM is disabled).
PUSH BC
LD A,% 00000011; include recording resolution
; In RAM and very RAM.
OUT (126), A
LD HL, BASIC_ADRES; sent from memory
; BASIC 128 in RAM.
LD DE, 0
LD BC, 16384
LDIR
LD A,% 00000000; turning off the RAM (if you wish
Or you can set the first
; Bit).
OUT (126), A
POP BC
POP AF
OUT (C), A; restore the port
; Expansion.
EI
RET
The remaining bits of port 126 (bit3-bit7) in
This refinement is not used, but
premise of the port they are better vanishes. Y
I hung on them: on bit 3 - on / off
Shadow RAM (0-inc), on bit 4 - on / off
entries in the shadow RAM (0-off) on bit 5 -
ON / OFF 512K (0 on). Placing or removing
inverters, we can pick up the necessary configuration when you
turn on the machine.
And finally, give the layout of pins RAM 62256:
10 A0 RAM D0 11
9 A1 D1 12
8 A2 D2 1913
7 A3 D3 15
6 A4 D4 16
5 A5 D5 17
4 A6 D6 18
3 A7 D7 1919
25 A8
24 A9
21 A10
23 A11
2 A12
26 A13
1 A14
20 O / CS
22 O / OE
27 O / WR GNDX 14
UccX 28
The layout of the port 126 DEC; # 7E HEX
bit0 - write to RAM (1-yes ,0-no);
bit1 - RAM (1-incl ,0-off);
bit2 - DOS force (1-incl ,0-off);
bit3 - shadow RAM (0-on ,1-off);
bit4 - write shadow RAM (1-incl ,0-off)
bit5 - 512K Mode (one-off ,0-on);
bit6 - reserved;
bit7 - reserved.
