TR DOS FOR BEGINNERS
This year, we continue to publish the book by V. Sirotkin
"General information on the disk system TP DOS. I must say that
the published Further materials are of interest not only for
beginners but also for more advanced users and programmers.
Hence the name column not fully reflect its content.
Continued. Start see the ZX REVIEW 1996 NN 1-2, 4-5, 6, 7-8
CHAPTER 5
Integrated circuits CD 1818 VG93.
-------------------------------------------
First of all we have to deal with the main controller chip
drive TRDOS (BETA DISK Interface): with a chip KR 1818 VG93.
All the logic of the system depends primarily on her. This chip
is a software mikroavtomat with the internal logic of the work
which manages the drive, the exchange of data between the
processor and drive, programming, track number, sector of the
disc, the length of sector, etc. etc.
In general, it provides all that is necessary for normal
work with drive. Exchange of data between the processor and
chip VG93 kopyutera occurs on an 8-bit data bus. On the same
bus is Programming microcontrollers in various modes and give
commands to the controller.
Graphic image chip is shown below in Figure 9.
FIGURE 9.
Pin assignment of the chip.
----------------------------- OUT! Mnemon. " PIN ASSIGNMENT
------------------------------------------------- 1 ! BS! Pins
control the substrate ! ! ki; in the schemes does not
connect. ------------------------------------------------- 2 !
W! Log ZAPIS.Pri W = 0 - Resolution
! ! entries in the selected case.
------------------------------------------------- 3 ! CS! LOG.
For 0 - chip select
------------------------------------------------- 4 ! R! Log
ChTENIE.Pri = 0 - IC
! ! gives nA Sh.D. contents of selected
! ! Nogo-sensitive.
------------------------------------------------- 5 , 6! A0,
A1! Include addresses the choice of internal
! ! VG93 register for read operations
! ! / Writing.
! !
! ! A1 A0 READ WRITE
! ! ------------------------------
! ! 0 0 REG.SOST. REG.KOMAND
! ! 1 0 REG.DOROZH. REG.DOROZH.
! ! 0 1 REG.SEKTOR. REG.SEKTR.
! ! January 1 REG.DANNYH REG.DANNYH
------------------------------------------------- 7 -14! D0-D7!
Input / Output data or instruction
------------------------------------------------- 15 ! STEP!
Output drive momentum for change ! ! absorption head on a
step (cylinder)
------------------------------------------------- 16 ! DIRC!
Output for the drive. At =
! ! 0 - moving the head from TSETRA
! ! to the edge;
! ! with = 1 - from edge to center
------------------------------------------------- 17 ! SL!
Output for an external register. Shift
! ! pulse data output from the WD to the left.
------------------------------------------------- 18 ! SR!
Output for external registra.Sdvig
! ! pulse data output from WD RIGHT.
------------------------------------------------- 19 ! CLR!
Reset input. When = 0 - IC
! ! executes the command RECOVERY.
! ! REG.SEKTORA dropped to # 01.
! ! Exit 39 (INTRQ) = 0.
------------------------------------------------- 20 ! GND!
Carcass output.
------------------------------------------------- 21 ! Ucc1!
Power supply + 5 V
------------------------------------------------- 22 ! TEST!
Log-speed movement of the head.
! ! When = 1
! ! Output 'STEP' pulse displacement
! ! of iditol with doubled frequency.
------------------------------------------------- 23 ! HRDY!
Log READY head. When = 1
indication of willingness to work.
------------------------------------------------- 24 ! CLC!
Clock Speed -------------------------------------------------
25 ! RSTB! Output GATE READING. Setting ! ! is a 1 after
taking 2 bytes
! ! zeros for single-density
! ! disk or
! ! 4 bytes of zeros (ones) for
! ! double-density disk.
------------------------------------------------- 26 ! S! Sync
input. Signal expression ! ! modest scale of the signals
RAWR. ------------------------------------------------- 27 !
RAWR! Log data from the drive.
------------------------------------------------- 28 ! HLD!
Ready output for the drive.
! ! (If = 1 - Ready)
------------------------------------------------- 29 ! TR43!
Exit CROWN POSITION.
! ! When = 1 specifies that the head
! ! on a cylinder with a large number 43.
! ! (The signal is produced only in
! ! the process of writing or reading)
------------------------------------------------- 30 ! WSTB!
Exit. When = 1 enables drive
! ! on the record.
------------------------------------------------- 31 ! WD!
Output data for writing to disk.
------------------------------------------------- 32 ! CPRDY!
Log in readiness for the drive
! ! Writing or reading.
! ! When = 0 - team
! ! Write / read is not satisfied,
! ! and generates a signal INTRQ.
! ! (Does not affect the rest of the auxiliary
! ! the auxiliary commands).
------------------------------------------------- 33 ! WF / DE!
INPUT / OUTPUT: ERROR / DATA.
! ! When WSTB = 1 - WF - LOG;
! ! (If WF = 0, then, to record any
! ! Manda stops).
! ! When WSTB = 0 - DE - EXIT;
! ! (On DE is set 0 for
! ! READING after loading head
! ! and HRDY = 1).
------------------------------------------------- 34 ! TR00!
LOG - ZERO PATH.
! ! When = 0, drive heads we find
! ! converge to 0 lane.
------------------------------------------------- 35 ! JP! Log
INDICES momentum.
! ! When = 0 - index pulse assumed
! ! Tang and drive began regular rotation.
------------------------------------------------- 36 ! WPRT!
Log NO RECORDING. (If = 0)
------------------------------------------------- 37 ! DDEN!
Log DENSITY DISC.
! ! (If = 1 - density double)
------------------------------------------------- 38 ! DRQ!
Output data strobe.
! ! * If DRQ = 1;
! ! During reading - an indication of
! ! that the Data Register contains information
! ! mation for transmission.
! ! During recording - READY regi
! ! SH 93 countries to take data from Sh.D.
! ! * If DRQ = 0;
! ! When reading - an indication that the data
! ! VG93 read from the register process
! ! litter.
! ! When REC indication that the register
! ! VG93 received data Sh.D.
------------------------------------------------- 39 ! INTRQ!
Ready output circuits.
! ! When = 1 - chip ready
! ! to take command;
! ! at = 0 - chip CARRIES
! ! command.
! ! OR has been read status register.
------------------------------------------------- 40 ! Ucc 2!
Power supply +12 volts.
-------------------------------------------------
For us, you will not need a thorough knowledge of the
functioning of all I / O chip, and modes of operation.
From the programmer's perspective, we need to know the
logic of the whole only a few findings that are connected
directly into the address space controller ports TP DOS.
VG93 chip has 5 internal registers accessible to the
programmer through which the management of the VG93, and one
external register made, usually on a chip 555TM9
(trigger-latch) for management drive and to poll preparedness.
All registers are connected to specific addresses in the
address space computer as input / output port, and hence
obraschatsyak to them should commands IN or OUT. But the simple
filing of these ports are no values or when you try to take
something out of these ports, you will accomplish nothing,
because these ports during the SOS BASIC available!
In TRDOS ROM has all the necessary commands to access
these ports, and the problem lies only in how to enter the ROM
TRDOS. That's what we let's talk a little later ...
ALLOCATION OF PORTS TRDOS - VG93.
---------------------------------
* REGISTER TRACK - PORT # 3F (read / write)
------------------------------------------- Used to record
number track for operations or for reading rooms current track.
* REGISTER OF SECTOR - PORT # 5F (read / write)
------------------------------------------- Serves as a record
number for the sector in operations or for reading rooms
current sector.
* Data Register - PORT # 7F (read / write)
------------------------------------------- Serves to exchange
data between the disk and computer.
* Command register - PORT # 1F (REC)
------------------------------------------- Serves as
controller commands.
* REGISTER OF - PORT # 1F (READ)
------------------------------------------- Serves to define
the current state of instruction execution .
* Control Register - PORT # FF
(Read / Write)
------------------------------------------------- Serves to
control the drive and willingness to read the chip VG93 - At
work or when exchanging data. This register is implemented on a
chip TM9 - trigger locks. When applying to the port byte, it is
stored - snaps.
Consider more control register (# FF).
** When recording in this register can select the number of the
drive, reset the IC VG93, choose the side of the disk drive and
willingness to choose recording density.
The figure below shows the bits of this register and what
they are accountable for Write to it.
Recording mode control register (# FF).
7 6 5 4 3 2 1 0
Selecting a disc
for = 0,0
CD 'A
reset IC
VG93, with = 0
Drive ready (= 1)
side of the disc at = 1 - top
at = 0 - low
recording density for = 1 - Single
at 0 - double
Bits 0 and 1 - with Trigger TM9 directly connected to the
inputs of the drive "DISK
A, B, C "
BIT 2 - is a CLR input circuits VG93
BIT 3 - this is the entrance HRDY chip VG93 and simultaneously
permit
the signal IP from the drive to the chip VG93
BIT 4 - is directly connected to the input drive "SIDE"
BIT 6 - this is the entrance DDEN chip VG93
While reading a register # FF used only 2 bits (see below).
Read mode control register (# FF).
7 6 5 4 3 2 1 0
NOT USED
readiness for = 1 - a willingness to exchange
DATA: in = 0 - data read / accepted
(Not ready)
readiness for = 1 - Run command
CHIPS VG93: at = 0 - a command to execute
or read register
STATE OF VG93
BIT 6 - this is the output DRQ chip VG93
BIT 7 - this is the output INTRQ chip VG93
VG93 chip provides the reception and execution of 11 teams
submitted in Instruction register. Each team, of eleven, has
its code-modifier, which modifies some of the conditions of the
command.
Conventionally, the team divided into four types:
1 - commands move the drive heads and search: this command
downloads (Pressed) of the head.
2 - command read / write disk sectors.
3 - load / store track and address labels.
4 - team forced interruption of operations.
The results of the implementation or non-commands are
displayed in the Register States, each bit of which carries
information on the implementation team.
Let us elaborate on each team.
Command of the first type.
------------------------
These commands provide a load of heads, ie, pressing of
them to the surface disc.
* The team RECOVERY.
............................
Moving heads the drive to the zero track (cylinder). If the
input TR00 chips will not appear on the exit confirmation heads
to 0, then via 256 pulse action teams stops.
Command code.
7 6 5 4 3 2 1 0
0 0 0 0 G V F1 F2
MODIFIER
When:
G = 0 - head raised.
G = 1 - head lowered (at work).
V = 0 - location of the head is not checked.
V = 1 - read and verify the number under the cylinder head.
F1, F2 - Codes of time moving heads (see table).
* KOMANDA SEARCH CYLINDER.
..........................
Command code.
7 6 5 4 3 2 1 0
0 0 0 1 G V F1 F2
MODIFIER
When:
G = 0 - head raised.
G = 1 - head lowered (at work).
V = 0 - location of the head is not checked.
V = 1 - read and verify the number under the cylinder head.
F1, F2 - Codes of time moving heads (see table).
Before the command register should contain the number
PATHS OF THIS CYLINDER and Data Register number is required.
Search continues for as long as the register PATHS is equal to
the data registers.
The search is performed when modifier V = 1!
* STEP TEAM.
................
Move the head by one step, (1 cylinder). Direction of
movement remains the same.
Command code.
7 6 5 4 3 2 1 0
0 0 1 J G V F1 F2
MODIFIER
When:
G = 0 - head raised.
G = 1 - head lowered (at work).
V = 0 - location of the head is not checked.
V = 1 - read and verify the number of the cylinder under the
head F1, F2 - Codes of time moving heads (see table).
J = 0 - the contents of the Register of tracks have not changed.
J = 1 - R. content is more expensive. changed to 1 (+ / -).
* TEAM step forward (toward the center of the disk)
......................................
Move the head one step ahead (1 cylinder).
Command code.
7 6 5 4 3 2 1 0
0 1 0 J G V F1 F2
MODIFIER
When:
G = 0 - head raised.
G = 1 - head lowered (at work).
V = 0 - location of the head is not checked.
V = 1 - read and verify the number under the cylinder head.
F1, F2 - Codes of time moving heads (see table).
J = 0 - the contents of the Register of tracks have not changed.
J = 1 - R. content is more expensive. increased by 1.
* TEAM step back (to the edge of the disc)
......................................
Move the head one step back (1 cylinder).
Command code.
7 6 5 4 3 2 1 0
0 1 1 J G V F1 F2
MODIFIER
When:
G = 0 - head raised.
G = 1 - head lowered (at work).
V = 0 - location of the head is not checked.
V = 1 - read and verify the number under the cylinder head.
F1, F2 - Codes of time moving heads (see table).
J = 0 - the contents of the Register of tracks have not changed.
J = 1 - R. content is more expensive. decreased by 1.
TEAMS OF THE SECOND TYPE.
----------------------------* TEAM READ SECTOR
(sectors). ......................................
The command is executed after the chip is identified VG93
Region IAM sector (index address label) and the calculated
checksum (All this happens automatically after the filing of
the team and does not depend on programmer).
The team should:
1. Set the head to the right CYLINDER
2. the Register SECTOR Record number required SECTOR.
Command code.
7 6 5 4 3 2 1 0
1 0 0 M S E C 0
MODIFIER
When:
M = 0 - reading a single sector, the contents of the Register
SECTOR increased by 1. M = 1 - after reading a single sector,
the contents of the register increases SECTOR
1, and begins reading the next - and so on until the
last sector to
Soundtrack.
S = 0 - of the disc NIH.
S = 1 - TOP of the disc.
E = 0 - no delay for the installation of drive heads.
E = 1 - a delay of 15 ms. to install the head after the signal
HLD Products
(Readiness).
C = 0 - of the disc is not checked.
C = 1 - verification of the disc in the identification process.
If in the process of identification chip does not find in
the field of IAM-NUMBER desired SECTOR, or do not find IAM, the
status register written sign "Mass Readings not found".
If after reading the sector did not match checksums, then
The status register is written sign errors, and the command
terminates.
When reading the array of data from the field in the Data
Register sector chip Each byte is accompanied by a data strobe
signal (DRQ output circuits; 6-th bits of the port # FF,
controller TRDOS).
If the current byte is not read from the data register to
data strobe signal before the arrival of the next byte, the
data register is written next bytes, and a status register is
recorded symptom data loss.
* TEAM ENTRY SECTOR (sectors).
......................................
The command is executed after the chip is identified VG93
Region IAM sector (index address label) and calculated control
amount (it all happens automatically after the filing of the
team and does not depend on programmer).
The team should:
1. Set the head to the right CYLINDER.
2. the Register SECTOR Record number required SECTOR.
Command code.
7 6 5 4 3 2 1 0
1 0 1 M S E C A
MODIFIER
When:
M = 0 - Write one sector, the contents of the Register SECTOR
increased by 1. M = 1 - after recording a single sector, the
contents of the Register sector enhances
at 1 and start writing the next, and so on until the last
sector to
Soundtrack.
S = 0 - of the disc NIH.
S = 1 - TOP of the disc.
E = 0 - no delay for the installation of drive heads.
E = 1 - a delay of 15 ms. to install the head after the signal
HLD Products
(Readiness).
C = 0 - of the disc is not checked.
C = 1 - verification of the disc in the identification process.
A = 0 - an entry in the domain IAM sign - "save data (# FB)
(without erasing). A = 1 - write in the IAM sign - "erase data
is allowed (# F8)".
If in the process of identification chip does not find in
the field of IAM ISSUE desired SECTOR, or do not find IAM, the
status register written sign SOLID READING NOT FOUND.
Once the IAM is found, it should request the data - a
signal DRQ. Chip recorded (automatically) the necessary gaps in
the sector (12 zeros) before the data area, then writes
"Address label data" and only then the data itself.
Before each request the next byte of data chip is exposed
Data strobe (output DRQ).
If the request DRQ in the data register will not be placed
next byte records, the status register to exhibit a sign of
data loss, and on disc can be written B 00!
After recording the whole data is automatically written to
a chip checksum 2 bytes and byte # FF.
KOMANDY third type.
---------------------* Read command ADDRESS
LABELS. ...................................
The command is executed when the drive heads are in working
position, ie pressed to a disc (signal HLD = 1). Read six bytes
Index of the disc, including the checksum (cylinder number, the
party drive, type sector, sector number, 2 bytes kontr.summy).
All bytes are accompanied GATE read bytes (output DRQ or
6-bit port # FF). When the command register contents are sent
to the TRACK SECTOR register and stored.
At the end of the command signal is generated INTRQ (7-bit
port # FF).
Command code.
7 6 5 4 3 2 1 0
1 1 0 0 0 0 0 E
- Modifier
When:
E = 0 - no delay for the installation of drive heads.
E = 1 - a delay of 15 ms. to install the head after the signal
HLD Products
(Readiness).
* COMMAND: READ TRACK entirely.
.................................
For this command reads all information from the track,
together with an index array of data gaps and areas. During the
reading is not issued GATE read bytes are not checked
checksums. It is used mainly this team for diagnostic purposes,
for example, to align the heads of the drive or in programs
such as "Track Copy".
Command code.
7 6 5 4 3 2 1 0
1 1 1 0 0 E 0 0
- Modifier
When:
E = 0 - no delay for the installation of drive heads.
E = 1 - a delay of 15 ms. to install the head after the signal
HLD Products
(Readiness).
* TEAM: TRACK RECORD IN WHOLE.
..................................
This command is used to format the drive. Record
information is at once a whole track. When you format all the
necessary information should be in the RAM / ROM and include
all spaces and index tags.
Command code.
7 6 5 4 3 2 1 0
1 1 1 1 0 E 0 0
- Modifier
When:
E = 0 - no delay for the installation of drive heads.
E = 1 - a delay of 15 ms. to install the head after the signal
HLD Products
(Readiness).
If you run any information written on the track, except
Some of bytes. Namely: the emergence of bytes # F5 ... # FE
interpreted as Home OFFICE MARKS. BYTE # F5 - entry code # A1,
initialize count checksum.
BYTE # F6 - write code C2 - an index mark.
BYTE # F7 - Record Checksum.
BYTE # FB - address label data.
BYTE # FE - address label index data.
All this is true for disk write double density (with
modified frequency madulyatsiey). For single-byte density labels
will be slightly different, but these drives have become a
rarity and considered single-density recording, we will not.
In the process of formatting tags, these bytes should not
be recorded in the Region gaps in data! More array of data to
format CDs will be discussed in a separate chapter.
TEAM fourth type.
........................
* TEAM 'FORCED INTERRUPT.
The command is intended to complete the operation and can
be written into the instruction register at any time.
Command code.
7 6 5 4 3 2 1 0
1 1 0 1 m3 m2 m1 m0
MODIFIER
When:
m3 = m2 = m1 = m0 = 0 command is terminated, but the signal is
not produced JNTRQ
(Port # FF, 7 bytes).
M0 = 1, an interrupt occurs during the transition from 0 to 1
at the entrance CPRDY. m1 = 1 interrupt occurs during the
transition from 1 to 0 at the entrance CPRDY. m2 = 1 interrupt
on the first index signal (beginning of the new Traffic CD). m3
= 1, an immediate interrupt and set the output JNTRQ tone
(Bit 7, port # FF).
During installation time moving the head in the team first
type depends primarily on the level of the input 'TEST' chips
VG93, clock pulses at the input CLK, and the state of modifier
commands # F0, # F1.
__________________________________________________
TEST! F1! F0! Time move 1 step
! ! ! When CLK = 1 MHz! when CLK = 2
-------------------------------------------------
1! 0! 0! 6! 3
-------------------------------------------------
1! 0! 1! 12! 6
-------------------------------------------------
1! 1! 0! 20! 10
-------------------------------------------------
1! 1! 1! 30! 15
-------------------------------------------------
0! -! -! 400! 200
__________________________________________________
Any team in the course of his performance updates the
status register chip (port # 1F reading). With the help of this
register is just being "Dialogue" between the computer and the
controller on the implementation or non-command.
Below is a table values of the bits in this register
when performing different commands. And after it is placed a
table that shows all the commands VG93.
