Decided to put an article in this issue. Although the scheme
is designed me for a long time (that I forget about it, the
text is lost). Article here some complement and expand.
The second window # 8000 - # bfff.
(C) 2003 Dmitry Terentyev
First, the main thing, why this scheme? Need that is all about
the rest later, and more!
This development allows access to upper memory
computer (with it any where you installed this development)
not through a window in the address # c000-# ffff, and a range
of # 8000 - # bfff. That is, as it opens a second window (not
in vain so named article).
What gives? Increasing the speed of programs that do transfer
from one page in memory to another (due to the fact it is not
necessary to use lower memory for the buffer, that is about two
times faster), or if you do not want to touch ordinary
expansion ports (here, the way we obtain some unification
standards for memory machines> 128kb, mixing in a single port).
More For example, in page # 5 to addresses located controller
that opens the appropriate page in memory and runs the program.
Closer to the body, so the scheme. It consists of several
blocks.
Option for the 128 th computer.
Multiplexing windows.
LA3 or any inverter
KP11 v
14 mux 12 '
2D0 B1 Q1 ND0 A15 LA3
September 11 o
2D1 B2 Q2 ND1 '
May 7
2D2 B3 Q3 ND2 o # 80
April 2 A16
# 80 B4 Q4 NEW # C0
13
OD0 A1 OD0-2 - data port # 7FFD
10 with the conclusions of TM9
OD1 A2 2D0-2 - data port # 78FD
6
OD2 A3 line with the port # 7FFD to multiplexer (KP11)
3 cut,
# C0 A4 in the gap to insert multiplexer KP11
1 # C0 - an old sample signal # C000
# 80 S NEW # C0 - a new signal sample # C000
apply for entrance to the multiplex KP11
15 board
/ E the old signal is cut off
# 80 - sample signal of the second window
addresses # 8000 - # BFFF
GND
Sampling Port # 78FD.
LA3
LL1
VD1
A14
'O>
A13 1 # 78FD
VD2
A12 VD1-VD2 - any diodes
'O> in case of glitches replace
A11 on the element LL1
blocking the port # 7FFD
A15
1
A10 1
'O' o> a new signal
sample
Port # 7FFD
apply instead of
A9 ^ old
An old signal
A8 sample
Port # 7FFD
Port # 78FD.
TM8
April 2
D0 D0 Q0 2D0
5 __ 6 2D1 inverted yield
D1 D1 Q1o 2D1 to resetting the
October 12 at # 8000 installed
D2 D2 Q2 2D2 page number 2.
13 15
D3 Q3
9
# 78FD C
1
R
GND
Option for computers with memory more than 128 kb.
In the multiplexer the windows to add another chip KP11.
KP11
14 mux 12 ND3, ND4, ND5, ND6 match memory
2D3 D1 Q1 ND3 256, 512, 1024, 2048 kilobytes.
Sept. 11 signals OD3-OD6 taken from the corresponding
2D4 D2 Q2 ND4 ing expansion ports (# 1FFD, # DFFD, etc.)
May 7
2D5 B3 Q3 ND5
April 2
2D6 B4 Q4 ND6
13
OD3 A1
10
OD4 A2
6
OD5 A3
3
OD5 A4
1
# 80 S
15
/ E
GND
Port # 78FD can do while on the scheme:
IR23
reg
D0 D0 Q1 2D0 any inverter
D1 D1 Q2 o 2D1
D2 D2 Q3 2D2
D3 D3 Q4 2D3
D4 D4 Q5 2D4
D5 D5 Q6 2D5
D6 D6 Q7 2D6
D7 D7 Q8 2D7
# 78FD CS
/ E
GND
I will explain a little work scheme. When I try to highlight
the addresses # 8000 - # BFFF Page Number 2, multipleksor KP11
intercept it and will be printed according to the addresses
page nomvrom from port # 78FD.
Program to check:
ORG # 6000; <# 8000
LD HL, # 8000
LD DE, # C000
LD BC, # 7FFD
LD (HL), 0
LD A, # 16
OUT (C), A; include at # c000 Page # 6
LD (DE), A
AND% 111; transform
XOR% 010; page number should always Ksor by% 10
; Bit1 inverse
LD B, # 78
OUT (C), A; include at starnitsu # 8000 # 6
LD A, (DE)
CP (HL)
RET Z; everything is fine, running (a revision)
RET; not working (not working)
