Modern ZX-Spectrum hardware

I have a few questions about the subject:

- what bits should the cache be decrypted by?
- the cache is 32kb - what did you decide? was it installed on 7FFD or EFF7?

- what is D0 responsible for in the EFF7 port? Where can I find a software description?
- D2 - upper memory, D3 - turbo, D5 - DOS ports, D7 - clock. Is this like this for everyone
or is there something else on these bits?
- And what should D4 in EFF7 actually do? Turn on an additional screen from the
upper memory (by the way, where is it located?) or flash 5th and 7th
screens in hardware?
- And what is connected to the D6?

- How does Turbo mode generally work? Why does it slow down in RAM and not slow down in the cache? It supplements with Wait every odd-clock command when working in RAM or
some other braking algorithm?

- cache-16 works instead of both BASICs?
- and if you make call #1d13 from the cache - TRDOS will work?
- and if you then return to #0000-#3FFF via RET - what will happen? The ROM is TRDOS, and the cache
will return when the program exits above #3FFF?

ZY. I don’t have a cache or turbo yet...

* Original written in HARDWARE.ZX
* Copied in REAL.SPECCY

Sincerely, Evgeniy.

30 Aug 00 23:13, Eugene Palenock wrote to All:

EP> - what bits should the cache be decrypted by?

For normal operation of MOD-Player by Cobra only on A2.
And for normal operation with programs under GS, get another addresses to taste...

EP> - cache-32kb - what did you decide? was it installed on 7FFD or EFF7?

According to 7FFD. There are no free bits on EFF7.

EP> - what is D0 responsible for in the EFF7 port? Where can I find a software
EP> description?

Hardware multicolor.

EP> - D2 - upper memory, D3 - turbo, D5 - DOS ports, D7 - clock. Is this the case with all
EP> or is there something else on these bits?

Like D2 is 512x192 :-/ I don’t remember, look in the help for MadROM.

I only have 512x192 and memory lock. The clock is always available
without any perversions - it’s simply not necessary and even rather harmful.

EP> - And what should D4 actually do in EFF7? Turn on
EP> an additional screen from the upper memory (and by the way, where is it located?)
EP> or flash hardware 5 and 7 screens?

Oh, sure, there was a hardware flasher hanging on some bit.

EP> - And what is connected to the D6?

Look for the REAL.SPECCY archive for two years and you will find out everything... ;-(

EP> - How does Turbo mode generally work?

On different machines it’s different. In the Pentagon it’s done through ()() and
brakingly.

EP> Why is itslows down in RAM and doesn't slow down in the cache?

Because the video controller has its own data bus, but they share DRAM
with the processor. So they divide, the processor slows down. And the cache hangs on the
processor bus
and is available at any time.

EP> It supplements every odd-clocked command with Wait
EP> when working in RAM or is there some other braking algorithm?

This is the case on the yellow scorpion, NOT IN TURBO MODE.
And the braking algorithm is simple - if the RAM is occupied by the video controller, then
the processor waits.

EP> - cache-16 works instead of both BASICs?

Yes.

EP> - and if you make call #1d13 from the cache - TRDOS will work?
^
0x3d00..0x3dff
The port will turn on TR-DOS. This may cause problems when launching
CP/M programs... TR-DOS ROM WILL NOT CONNECT (CACHE REMAINS).

EP> - and if you then return to #0000-#3FFF via RET - what will happen? ROM
EP> TRDOS, and the cache will return when the program exits above #3FFF?

See above.

EP> PS. I don’t have a cache or turbo yet...

And I don’t have a turbo.

* Crossposted in REAL.SPECCY

VG ports seem to be open.

██▓▓▓▒▒▒░░░ Sergey aka Cyber from Cobra Software.
█▓▓▓▒▒▒░░░ 500:322/62 500:322/67.16

... [I ZX] [Beer] [Storm] [Turbo Commander] [ZXNet] [FidoNet] [Offspring]