Corrected connection diagram to Profi v3.2 1Mb Simm

ZXNet echo conference «real.speccy»

From Musa Khaybullin To All 4 August 1999

Greetings, All!

I apologize to you guys for some small mistakes made during the production of this material. I am re-uploading the completely(!) corrected and
added material.
We kindly request you to completely remove the old material and replace it
with new one. ______________________________________________________________

The MAi address and control buses RAS, CAS, WE are combined, and the DI and DO data make up two eight-bit buses. The MAi signals can be swapped with each other.

A SIMM is a set of similar chips in which the DI and DO signals are connected together. The address buses MAi (according to the Pro scheme - this is
Ei) and control buses RAS, CAS, WE are connected to signals of the same name on
SIMM. The Di SIMM signals must be divided into DIi and DOi.

To do this, you need to assemble the following circuit.

╔═════════════════════════╗
1533AP5 ║ SIMM1024K ║
┌───────────┐ ║ ┌──────┐ ║
Di0──────┤ DA0 DB0 ├──Ґ──┤D0 MA0├── E1 ╟─── DO0
. ──────┤ DA1 DB1 ├──Ґ──┤D1 MA1├── E2 ╟─── .
. ──────┤ DA2 DB2 ├──Ґ──┤D2 MA2├── E3 ╟─── .
. ──────┤ DA3 DB3 ├──Ґ──┤D3 MA3├── E4 ╟─── .
. ──────┤ DA4 DB4 ├──Ґ──┤D4 MA4├── E5 ╟─── .
. ──────┤ DA5 DB5 ├──Ґ──┤D5 MA5├── E6╟─── .
. ──────┤ DA6 DB6 ├──Ґ──┤D6 MA6├── E7 ╟─── .
Di7──────┤ DA7 DB7 ├──╨──┤D7 MA7├── E8 ╙─── DO7
GND/VCC<─┤ DIR │ │ MA8├── E9
┌──┤ CS │ │ MA9├── E10
│ └───────────┘ │ RAS├─────────────────── RAS
WE ────┴────────────────────WE CAS├─────────────────── CAS
└──────┘

The DIR signal on the AP6 determines the direction transmission from buses
DA to buses DB. To connect a 1Mb SIM you will need to generate an E10 signal. The CAS signal must be supplied from U46 6n [LI1].

And here is the pinout of the Simm module pins:

30-pin SIMM (SIPP)

│number │ pin │number │ pin │

│ 1 │ +5v │ 16 │ DB4 │
│ 2 │ CAS │ 17 │ MA8 │
│ 3 │ DB0 │ 18 │ MA9 │
│ 4 │ MA0 │ 19 │ MA10 │
│ 5 │ MA1 │ 20 │ DB5 │
│ 6 │ DB1 │ 21 │ WE │
│ 7 │ MA2 │ 22 │ GND │
│ 8 │ MA3 │ 23 │ DB6 │
│ 9 │ GND │ 24 │ NC │
│ 10 │ DB2 │ 25 │ DB7 │
│ 11 │ MA4 │ 26 │ D8-out│
│ 12 │ MA5 │ 27 │ RAS │
│13 │ DB3 │ 28 │ CAS-pr│
│ 14 │ MA6 │ 29 │ D8-in │
│ 15 │ MA7 │ 30 │ +5v │
└───────┴───────┴───────┴───────┘

All signals MAi, RAS, CAS, WE are the same, that are supplied to RU5 or RU7 (on Profi
the addresses are named from E1 to E10). The data inputs and outputs of the SIMM are combined, so
when installing the SIMM it is necessary to install an additional buffer between the processor data bus and the SIMM data bus.


In the computer circuit.

┌───────────────── from DI Z80
│ RU5(7)
│ ┌──┬───┬──┐
└──┤DI│ │DO├──── per buffer
├──┤ │ │
┌──┤WE│ │ │
│
└───────────────── signal
recording


Connection SIMM

555AP5
┌──┬───┬──┐
┌────oOE│ │ │
│ ├──┤ │ │
│ │..│ │..│
│ ┌──┤DI│ │DO├─┐
│ │ └──┴───┴──┘ │
│ └──────────────── from DI Z80
│ │
│ SIMM │
│ ┌──┬───┬──┐ │
│ │ │ │Di├─┴─ to the buffer
│ │..│ │..│
│├──┤ │ │
│ │ │ │ │
├────┤WE│ │ │
│
└────────────────── signal
recording

CAS-pr connect to +5v via 1 kOhm.
NC, D8-out, D8-in do not connect anywhere.
MA0..MA10 - multiplexed the addresses are similar to the addresses RU5(7) (on the Pro
addresses from E1 to E10).

The WE signal is best supplied to the circuit through the following
node:

U31 LI1
┌──┐ ┌───┐ ┌──┐
│ &│8┌──┤ └──┤ &│ WE
│ O─┘ ┌┴┐ │ ├────
│ │ R1│ │ ┌──┤ │
└──┘ └┬┘ │ └──┘
└───┤
═╪═C1 R1 = 430 Om
─┴─ C1 = 200 Pf

Scheme reworking memory regeneration and formation
Megabyte address for Profi.


┌──┐
┴ │ U52
│ 10┌──┬──┬──┐9 E6
DA21 ───┐X└───┤B1│MX│YB├──────
│ 11├──┤ │ │
DA9 ─────────┤B2│ │ │
│ 12├──┤ │ │
ADR12──┐│X┌───┤ B3 │
││ │ 13├──┤ │ │
ADR5 ─────────┤B4│ │ │
││ │ └──┴──┴──┘
┌────┘ │ ││ ┌───┐
│ ││ │ ┴ U53
│ ││ │ 10┌──┬──┬──┐9 E10
│ ││└───┤B1│MX│YB├──────
│ ││ 11├──┤ │ │
D1 │ │└─────┤B2│ │ │
────┘ │ 12├──┤ │ │
┌───────┤B3│ │ │
D2 ││ 13├──┤ │ │
─────┘└──────┤B4│ │ │
└──┴──┴──┘

D1 - 6 pin U60 [LI3] (512 bits)

D2 - 8 leg U60 [LI3] (1MB bit)

It is also necessary to cut the tracks between U60 12n [LI3] and U53 4n [KP12], and
between U45 11n [LI1] and U36 13n [LP5]. Then connect U60 12n [LI3] with U36 13n
[LP5], and U53 4n [KP11] with U45 11n [LI1]. That is, in fact, you get a transfer of
SEGA2
to SEGA3.
This scheme for forming memory regeneration actually spreads the
screen area across all pages of RAM, this achieves 100% normal
memory regeneration - in resident mode, neither Honey Commanderv4.00 nor
iS-Dos are spoiled ;)

If something is not clear, write with soap ;)
________________________________________________________________


Long life and prosperity to you, All!

With best wishes, Musa Khaybullin.