HD

Here you go.
I recommend that you take a critical look at the recommendation to install the 1533 series in the generator.
And for a 5.25" flop, the HD signal must be connected to pin 2 of the connector (the first one on the edge!). And
set the jumpers correctly!

Orig.Area: REAL.SPECCY
Orig.From: Alexander Kormishin (2:4616/11.3)
Orig.To : All ()
Orig.Subj: HDscheme, option #2
Orig.Date: 06 Mar 99
─═─═─═─═─═─═─═─═─═─═─

Hello, All!

I’m willing to bet that no one succeeded in repeating scheme option #1 :) A considerable
part of the blame for this. lies with me...

During the tests of the subject, two unpleasant features of the Pentagon-128 boards were noticed. The first: data is written to DD62 (TM9, port register #7FFD)
is not done as it should be. As a result,
if the processor is slow or there is a reactive load of a decent
magnitude on the data bus, data will be written to this port with glitches. It can be treated by inverting the sampling signal of this TM9.
The second feature: the /DOSEN signal, before getting to the 1st ROM pin, is mixed with A14 and A15. The benefit of this is a moot point, but the result is brakes with Basic/TRDOS ROM switching. Here you need to apply the old signal from DD36:1 directly from DD76:9. cut off.

In the diagram (below) this is all reflected.

Tested on two pentagons and oneLeningrad-clone.

....................................................

(c)1998-1999 AXLR
════════════════════════════════ ════════════════════════════
Modification of the controller to work with HD disks, option #2
══════════════════════════════ ══════════════════════════════

Here is a turbo mode scheme that provides higher
performance than the old one. The new one according to tests gives
more than 113000 cycles/int.
There is also an improved circuit for switching
the VG93 clock frequency, now this should work on any
Pentagon.

──────────────────────────────── ───────────────────────────
Scheme of turbo mode Z80-7MHz for the Pentagon-128 computer
──────────────────────────────── ───────────────────────────

*100pF
D1.1 ─┬─ D2.1
┌──┐ === ┌──┬──┐
DD3:2 ────1│ &o3──┴─────13o R│ │
DD3:3 ────2│ │ ┌────12│ D│ _│
└──┘ │
DD15:5 ──────────────┘ │ └──┴──┘
+5V
^^^^^^ We take all signals from the computer board.

D3
┌──┬──┐
DD45:3 ────────2│A0│ │
+5В ───5│A1│ │
├──┤Y0│4─────>DD45:12
DD2:9 ────┬───3│B0│ │
┌─────6│B1│Y1│7─────>Z80:24
│ │ ├──┤ │
+5В D2.2 ┌──────1│ S│ │
│ ┌──┬──┐ ││ │ ┌15oOE│ │
├─1o R│ │ ││ │─┴─ └──┴──┘
__ ┌──2│ D│ _│ ││ │
M1 (Z80:27) ─────────3/ C│ Qo6┘│ │
│└─4o S│ │ │ │
│ └──┴──┘ │ └───────────────┐
│ └───────────────┐ │
D4.1 └──────────────────────────┐ │ │
┌──┐ │ │ │
/bit7#FF───1│ 1│3────┐ │ │ │
DD76:9 ────2│ │ │ │ │ │
└──┘ │ │ │ │
+5В D5.1 │ D4.2 "NORMAL" │ │ │
│ ┌──┬──┐ │ ┌──┐ S1 │ │ │
HLD──┬──1o R│ _│ └─ 4│ 1│6 ───── \ │ │ │
│├─2│ D│ Qo6────┬─ 5│ │ ┌─ \──────┘ │ │
/IP─────3/ C│ │ │ └──┘ │ │ │
│└─4o S│ │ │ D6.1 │"TURBO" │ │
│└──┴──┘ │ ┌──┐ │ │ │
│ └─ 1│ &│3 ───┘ │ │
└───────────────── 2│ │ │ │
└──┘ │ │
/IORQ ─┬──────────────┐ │ │
│ D7 │ │ │
│ ┌──┬──┐ │ D4.3 D6.2 │ │
└14│ R│ 0│ │ ┌──┐ ┌──┐ │ │
+5В ──11oWR│ 1│ └─10│ 1│8 ───────4│ &│6──┘ │
┌─5/+1│ 2│6────── 9│ │ ┌─5│ │ │
│ ├──┤ 3│ └──┘ │ └──┘ │
│ │ │ │ │ │
│ └──┴──┘ │ │
└─────────────────────────────────────────┘
│
D6.3 D5.2 │
┌──┐ ┌──┬──┐ │
Z80:26 ──10│ &│8─────13o R│ _│ │
DD49:11── 9│ │┌─────12│ D│ Qo8──────┘
└──┘│ ┌───11/ C│ │
Z80:28 ────────┘ │ ┌10o S│ │
DD50:13──────────┘ │ └──┴──┘
+5B

Сигнал HLD берется ВГ93:28, /IP - с ВГ93:35,
/IORQ - с Z80:20, а /bit7#FF - см. ниже.

─────────────────────────────────────────────────────────────
еобходимые переключения/доработки на платеcomputer:
────────────────────────

1. Disconnect DD5:2(LI3) from Z80:28.
2. Disconnect DD15:1(TM2) from +5V, apply the /RFSH (Z80:28) signal to this DD15:1
3. Disconnect Z80:6 from DD1:8(L 1) so that there remains a connection
between Z80:6 and a resistor connecting it (resistor)
to +5V.
4. The signal from DD45:10(TM8) is supplied to Z80:6.

5. We replace the VD2+R13 circuit in the controller circuit with the element
LI1, we find the free element LI1 on the computer board:

as it should be:

C39 ───┐
│ LI1 DD76(TM2)
DD77(LL1) LI1 │ ┌──┐ ┌──┬──┐
┌──┐ ┌──┐ └─│ &│────13│ │ │
│ 1│11 ───┬───────│ &│────│ │ │ │ │
│ │ === C3 ┌─│ │ └──┘ │ │ │
└──┘ ─┴─ │ └──┘ └──┴──┘
│
DD78(AG3) │
┌─────┐ │
│ │12─┘
│ │
└─────┘

6. The signal coming from DD64:13(LE1) is disconnected from DD62:9(TM9)
we pass it through the existing electronic circuit LA3 and only then
we feed it again to DD62:9, like this:

D2.3
┌──┐
┌─10│ &o8───> DD62:9
DD64:13 ──┴─ 9│ │
└──┘

7. Signal from DD76:9(TM2) send to DD36:1 (27c512), old
signal from DD36:1disconnect;

8. If necessary, replace DD76(TM2) with a faster-
series 1533.

──────────────────────────

Actually, a modification for switching the clock frequency of
VG93 + modification of the “turbo-VG”.

Two circuits are given here, the first takes into account the presence of sections in the
controller that use a frequency of 8 MHz (for example,
a PLL circuit); the second is for controllers that do not
have such sections.
Without modifications, the Pentagon controller uses
only 4 MHz, so if a PLL is not
found in the controller circuit, it makes sense to install a second
on such Pentagons diagram.

────────────────────────────
If there is a PLL on the 556RT4, then we assemble the following:
───────────────────────── ────────────────────── ───────────────

D10.1
┌──┬──┐ D6.4 +5V
VG93:33─1о R│ _│ ┌──┐ │
┌─2│ D│ Qo6──13│ &│11┬────────────┐
VG93:38─3/ C│ │ ┌─12│ │ │ │ D8.2 │
/STEP───4о S│ │ │ └──┘ │ │ ┌──┬──┐ │
│ └──┴──┘ │ │ └1o R│ Q│5────────┐
─┴─ D8.2 └┐ │ ┌2│ D│ │ │ │
┌──┬──┐ │ │┌─3/ C│ _│ │ │ D1.2
┌─13o R│ │9──┐ └──4o S│ Qo6┐│ D9.1 │ ┌──┐
D7─────12│ D│ _│ ││ ││ └──┴──┘ ││ ┌──┐ └4│ &o6─ DD76:3
DD88:9─11/ C│ Qo8─┤││└─────────┘└1│ 1│3─5│ │
├─10o S│ │ ││ DD86:6─┴───────────────2│ │ └──┘
│ └──┴──┘ ││ 50..150 Ohm └──┘
+5V │└──███─> "HD/DD", feed the "HD/DD" microphone
│ in the drive (see below).
│
└──> /bit7#FF

Signal D7 - take from Z80:13.
/STEP - from the disk drive connector.

In the controller, we cut off the old signal coming from DD86:6(L 1) to
DD76:3(TM2). Instead of 8 MHz, we supply
a signal from D1:6 to the PLL circuit (LA3 is being finalized, see above).
Instead of 8 MHz quartz we put 16 MHz quartz. If the DD86 (L 1) series
155 or 555, it is recommended to replace it with 1533L 1. Otherwise
the generator assembled on this DD86 may not start.

─────────────────────────
If there is no PLL on the 556RT4, then we collect like this:
────────────────────────────

D10.1
┌──┬──┐ D6.4
VG93:33─1о R│ _│ ┌──┐
┌─2│ D│ Qo6──13│ &│11─┬──> DD76:4
VG93:38─3/ C│ │ ┌─12│ │ │
/STEP───4о S│ │ │ └──┘ │ D9.1 D1.2
│ └──┴──┘ │ │ ┌──┐ ┌──┐
─┴─ D8.2 └┐ └─1│ 1│3───4│ &o6──> DD92:3,
┌──┬──┐ │ DD86:6 ──2│ │ ┌─5│ │ DD92:11,
┌─13o R│ │9──┐ └──┘ │ └──┘ DD93:2
D7─────12│ D│_│ ││ DD76:5 ──┘
DD88:9─11/ C│ Qo8─┤│
├─10o S│ │ ││
│ └──┴──┘ ││ 50..150 Ohm
+5V │└──███─> “HD/DD”, we feed it to the “HD/DD” microphone
│ in the drive (see below).
│
└──> /bit7#FF

We take the D7 signal from Z80:13.
/STEP - from the disk drive connector.

In the controller, we disconnect DD76:4(TM2) from +5V;
the signal coming from DD76:6 is cut off from DD92:3(TM2), DD92:11
and DD93:2(IE10) so that these three pins of the microcircuits
(DD92:3, DD92:11 and DD93:2) were connected between yourself.

────────────────────────────

Microcircuits used in the modification:

D1: 1533LA3, D2: 1533TM2, D3: 1533KP11, D4: 1533LL1,
D5: 1533TM2, D6: 1533LI1, D7: 1533IE7, D8: 1533TM2,
D9: 1533LL1, D10: 1533TM2.

Any microcircuit, except D1(LA3), D8(TM2) and D9(LL1) can
be replaced with a similar one of the 555 series. If quartz-16 MHz
was not used, all microcircuits can be installed in the 555 series.

As you can see, modifications have already been assembled here "turbo-VG". If
it was already installed on the computer being modified, then you do not need to install
exactly the same el.t TM2, but you need to take an existing
signal (inverse trigger output) and apply it to
D6:13 of the modification.

The "HD/DD" signal is recommended to be applied todisk drive
microphone via the 2nd reserve contact (numbered as 4th on the
disk drive connector) - for 5.25" (1.2M) drives this
is a standard disk rotation speed control signal
(300/360 rpm). And for 3.5" (1.44M) drives this is usually
a free contact.
The HD/DD microphone is located on motor board, above
the "HD" hole in the disk (it is usually sealed). and usually a common wire goes to one
leg of the microphone, and on the other
the control signal for the disk drive chip is removed. Here we send the “HD/DD” signal to the second
leg of the mikrik.

Attention! If you connect a 5.25" (1.2Mb) disk drive, then
you just need to send the "HD/DD" signal to it, and
you don't need to modify anything in it, everything is already there.

* * *

When installing this modification not on the Pentagon, the main
problem is coordinating the control of the turbo mode
modification with the turbo circuit in the computer. Everything else
is done the same as on Pentagon: the controller is being modified to switch 8/16 MHz frequencies, bit7 is being added to the system port of the controller (port #FF) and the “turbo VG” is being assembled, if it is not already there, you need to pay attention
to the presence of a /wait driver in the turbo circuit when the processor accesses the ports. If such a section is missing,
it is recommended to assemble it, for example, as suggested above
(here assembled on IE7 and LL1).

If the computer has software control
of the turbo mode, the "turbo/norm" switch can be done
as shown below:

D4.1
┌──┐
/bit7#FF───1│ 1│3────┐
/DOSROM ───2│ │ │
└──┘ │
+5V D5.1 │ D4.2 LA3 LA3
│ ┌──┬──┐ │ ┌──┐ ┌──┐ ┌──┐ TURBO'
HLD──┬──1o R│ _│ └─ 4│ 1│6 ─────│ &o─────│ &o────────>
│├─2│ D│ Qo6────┬─ 5│ │ ┌───│ │ ┌│ │
/IP─────3/ C│ │ │ └──┘ │ └──┘ │└──┘
│└─4o S│ │ │ D6.1 │ LA3 │
│ └──┴──┘ │ ┌──┐ │ ┌──┐ │
│ └─ 1│ &│3 ─────│ &o────┘
└───────────────── 2│ │ │ ┌─│ │
└──┘ │ │ └──┘
LA3 │ │
┌──┐ │ │
┌──│ &o─┘ │
├──│ │ │
│ └──┘ │
TURBO ─────┴─────────┘

where: /DOSROM - signal in the controller, low level
switching (pages) of the ROM from Basic to TRDOS;
TURBO - program control signal for turbo mode,
high level turning on the mode"turbo" Z80.
/bit7#FF - see. above;
/IP - VG93:35;
HLD - VG93:28.

…………………………………………………

Goodbye, All.

- --- LAYAA v4.00
* Origin: still: wanted.╘══════════ end of file ═════════════──

All good>What. Roman.