CACHE+

I think that in the finalization of "CACHE - 62256", the diagram of which I uploaded here, it is necessary
to make a small change. Inputs KP11 A (2,14,11) and B (3,13,10 respectively)
swap places, or apply /bit1 to the 1st leg (inverse instead of direct). So
it will be more logical. Then bit 4 # CFF7 - turns on the 32K cache (high address -
bit 4 #7FFD), bit 2 - turns on DOS emulation (+16K cache), bit 1 - turns on
SOS emulation.

All the best.
Best regards, Roman.