upgrade zx-spectrum

Press RESET immediately, Alex!

21 Oct 00 21:05, Alex Gerasimov wrote to Kirill Frolov:

AG> You once threw a circuit into the echo that allowed you to turn on any bank
AG> of RAM in any place from #0000 to #ffff, so... your circuit
AG> supported only 256 kilo... couldn't you you can make a circuit
AG> that supported 1024 kilos...

Of course, you can do it on 4Mb - this is the maximum for 8-bit registers.
But 256kb was precisely because it provided a very simple and uniform
connection to any Soviet zx-spectrum clones with memory >=128kb. And if
I make the register width not 4, but 8 bits, then it will be completely different
to connect to different zx-spectrum clones, even for example in the case of a scorpion
with 1Mb of memory, different options are possible.

AG> I have a scorpion...And I noticed that when reading from the screw into the area
AG> #8000-#c000 data is sucked in at a speed of 80-100 kilos per second...
AG> and now if you substitute the banks not with #c000, but with #8000, then the result is on
AG> face... If it’s not a hack, of course... do it, plzzz...

Speed problems are generally not solved using exactly the same methods.
As for support 1Mb, then I will never expand the existing scheme to 8 bits
, for the reason described above. I only agree to
a universal and fast-working method for all zx clones. With diagram
onregister 4x4 256kb is the limit and works quite slowly.

If you have any ideas on how to implement ^^^ what I wrote here
, then write, I’ll think about it. If you’re not too lazy to still work with a soldering iron,
then write too, I have my own ideas, a fundamentally new method, maybe
may be a little difficult to implement. The idea is not to switch banks using
out (x), x commands and waste precious processor time on this -
loading registers and executing the out command. After all, banks can be switched
with shorter commands, for example, 2-byte commands in 8 clock cycles, single-byte commands
in 4 clock cycles. Moreover, switching banks is not efficient at all, I want
to make it so that in 2 processor commands it is possible to access any
data memory, assuming that the same addresses will contain executable code.
In fact, the desired bank will be turned on for a very short time, only to
read or write an operand from memory and this will not take up any
processor time. I'm just expanding the address space of the processor
beyond 64kb.

How I imagine the implementation of the above nonsense:

Option 1: high-speed PLM is the ideal way.
Option 2: ROM with a capacity of ~64kb, yes limitation on the maximum
processor clock frequency due
to the speed of the ROM.
Option 3: Fine logic and possibly a small high-speed ROM
. It will be a complex circuit.

I like the second option better: I don’t understand anything about programming
modern PLMs and I can’t even imagine how it could be implemented.
I’m also not sure that the circuit according to the 3rd option will be easy to assemble and debug.
And in the case of using a large ROM, the circuit Any pioneer with a soldering iron will assemble it
and it will either work or not.

And how will it work: the ROM connected to the data bus will
analyze the flow of read commands by the processor and in a certain way
react to individual commands by controlling the switching of memory banks.
From a point of view processor it should (as I think) look like this: some of the unused commands will be used to control the memory management circuit and also memory banks will be switched during the execution of individual commands. For example, 7 commands ld r8, r8, almost
not used in meaningful code, can be used to control
the memory switching circuit. You can also use 8-byte instructions
ED XX, but they are 4 clock cycles longer, which is not very good. Also, when executing memory operating commands (push, pop, ldi, cpi, ld r, (hl),
inc (hl), rl (hl), lf (hl), N...) depending on the configuration of the memory management circuit, it is possiblereplacing the jar with another one. You can, for example
replace a jar only if there was a prefix before the command (command
ld r8, r8) or always when executing certain commands, for example
operating with index registers.

All of the above could make it possible to easily work with volumes
of memory greater than 64kb without large time spent switching memory control circuits. In fact, you can switch different areas of memory in almost every
command with relatively little loss of performance.

* Crossposted in REAL.SPECCY
* Crossposted in HARDWARE.ZX