16-color mode v1.0
ZXNet echo conference «real.speccy»
From Dima Bystrov → To All 23 October 2005
The mode is based on “hardware multicolor” (all 3
standard circuits and the optional “separate bright” circuit are used).
After the modifications below, it shows 16 colors for each pixel. Very usable, unlike multicolor. It is turned on by the 0th bit of port #eff7 (I think there is no need to explain how to assemble this port).
The signals are indicated for the pentagon.
CHAIN1 "/BUSRQ"
It is formed by the mounting "OR" (D10/8 "OR" /eff7b0) and is fed to /BUSRQ
processor.
CHAIN2 "A13V" (D17/11)
13th address on the video controller multiplexers. Formed by editing "AND" from
signal eff7b0 and frequency 7/8M (as in the old "attribute per byte" scheme:
/=== Begin Windows Clipboard ===/
eff7 bit 0 ---|<--,
c29 in (9/D15)-|<-+---> a13v (11/D17)
|
▒
|
v+5
/=== End Windows Clipboard ===/
instead of C29 you need frequency D3/2). If there is 384x304, this signal is chained BEFORE
the 384x304 circuit, because the 384x304 circuit already provides for the mixing of the old
A13V.
CHAIN3 "A14V" aka "P0V" (D17/14)
14th address on the video controller multiplexers (selecting an odd page).
It is formed by editing "OR" from the /eff7b0 signal and the frequency 7/4M (D3/3). Clings
TOcircuit 384x304.
CIRCUIT4 "flashed mask" (D6/11)
switched there (KP11. selection by signal eff7b0) 3.5 MHz (D1/8).
CHAIN5 "2nd bright" (D47/11)
the 7th bit of attributes is switched there (D7/12)
CHAIN6 “attribute reading strobe”
for the primary buffer (D37/11) - 3.5 MHz is switched there (more precisely, D45/2).
for the secondary buffer (D40/11) - 3.5 MHz is switched there, lagging 90° from
the previous one, that is D1/9.
CHAIN7 "addressing selection: ATTR or MASK"
leave the same as it was in the "attribute per byte" circuit:
/=== Begin Windows Clipboard ===/
_____
eff7 bit 0 ---|<--,
c29 in (9/D15)-|<-+---> c29 out (3/D8 only)
|
▒
|
v+5
eff7 bit 0 --->|--,
c30 in (8/D15)->|-+---> c30 out (1/D14 only)
|
_ GND
/=== End Windows Clipboard ===/
ALL!
as we see, nothing from the diagram "attribute per byte" is not thrown out, the soul does not hurt.
Only one microcircuit is required - 1533KP11 (switches circuits 4, 5, 6).
Addressing as in ATM (#c000+, #4000+, #e000+, #6000+, etc.), but with a standard
layout, as in a regular one Spectrum mode.
Inside the byte, the bit layout is like in ATM (%IiGRBgrb, where IGRB is the right pixel)
When collected on the Pentagon, the following are observeddefects:
1. The right 8 pixels are taken from the beginning of the line + 8 bytes.
2. The left 4 pixels are affected by the processor.
If you really want to fix them, collect the following:
D10
┌─────┐
border │ TM2 │
address 12│ │
──────┬────┤D │ border
│ │ _│8 graphic
│ │ Qo──────────┬─ x ────┬────
│ └─────┘ │ ┌──┐ │
│ ┌──┐ └───┤1 │ │
└──┤1 o───┬───────────────┤ ├─┘
└──┘ │ /eff7b0────┤ │
│ └──┘
│
└─> on CIRCUIT1 (instead of D10/8)
Then in the new mode, 3 pixels on the left and 5 on the right will not be visible.
- A.Coder [Wolf3d2004 InfoGuide7 ACEdit96 ACN42 PT3695 Chip13 HexFill HDDoct6]
[Ansi04 8col12 ZXRar27UnR59 Jpg042 CacVox1 Dbs07 Gluk61R PC21 Alasm5.01 Sts70i]
... ZX Spectrum today
From Dima Bystrov → To All 23 October 2005
If you really want to fix them, collect the following:
D10
┌─────┐
curb │ TM2 │
address 12│ │
──────┬────┤D │ border
│ │ _│8 graphic
│ │ Qo──────────┬─ x ────┬────
│ └─────┘ │ ┌──┐ │
│ ┌──┐ ┌──┐└───┤1 │ │