From
Victor Ronin
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To
All
17 October 2006
Hello hero
Well, Kai1024 is essentially Kai256+Pentagon(256)+another bit :)
what glitches can appear - very simple, some kind of “smart” test
programs that check all clones may cleverly go crazy without calculating
intersection of pages managed from different ports. theoretically this is possible. on
Kae1024 seemed to sometimes come across something similar (I don’t remember), while under it
more programs have not been changed.
IMHO - you need to make a single memory model, and switch the type in the setup.
From
Dmitry Demyanenko
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To
All
17 October 2006
Hello, All
People who made a can switch in their machine that works in parallel
for several memory models without a switch (for example KAY1024
/Pentagon/Scorp) . And in general, what kind of glitches can come out of this?
From
Dmitry Demyanenko
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To
All
17 October 2006
Hello Ronin
Yeah, a setup in the form of 4 with a common latch 1 P2K :) As I saw somewhere
From
Valery Tkachuck
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To
All
18 October 2006
Hello Ronin
Ron> can cleverly go crazy without calculating the intersection of pages
And if we make more memory so that all addressing options work in every
their area and did not intersect? Memory is cheap - 1 meg, 4-16 special
there is no difference, especially if SIMM is used. Toda is probably not only KAY1024
/Pentagon/Scorp, but also Pro, Turbo-2+ can be put in: smile; .;
From
Valery Tkachuck
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To
All
18 October 2006
Hello hero
her> for manually clicking memory models, is there any thread
her> standard
That is you are leaning towards the software model - through drivers. For some purposes
like a future computer for ARM, for example, with a full-fledged axis - this is probably
more correct, but for a clone in ideology a la newTurbo-N+ - so and increasing memory
you can do without any new memory port switch registers (if
Of course, these ports themselves can be made friends with each other): smile; .;
You just need to understand what kind of computer it is for. From here it will already be clear that
necessary.
From
Dmitry Demyanenko
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To
All
18 October 2006
Hello, Black_Cat
Exactly!!! I didn’t think of it, I need to put 64 mega memory in the spec and that’s it
problems are solved!!!
From
Dmitry Demyanenko
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To
All
18 October 2006
Hello hero
By the way, is there a thread for manually clicking memory models?
standard (I mean port and bits)??
From
Mark Antonov
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To
All
18 October 2006
Hello hero
her> By the way, is there any kind for manually clicking memory models
her> standard thread (I mean port and bits)??
there was a certain bit in port #eff7 that disables the upper memory in the Pentagon 512(1024)
test4.30 seems to even be able to see 2048kb of memory only xs according to what standard
From
Dmitry Demyanenko
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To
All
18 October 2006
Hello, The Exploited
Implementation is the second thing (in the Pentagon, for example, you could implement it
bit from the EFF7 port and a port like AFF7 - which allows you to address up to 4 meters
but for now this is not an end in itself), what is more interesting is what problems the machine causes, and
opportunity, give reasoned arguments so that I would refuse it with
with a clear conscience :)
From
Andreas Kaiser
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To
All
18 October 2006
Hello, Black_Cat
Bla> Theoretically, everything can be implemented...
Oh fuck! Comrade, brevity is the sister of talent.
From
Valery Tkachuck
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To
All
18 October 2006
Hello hero
her> what problems does the machine cause, and if possible, provide
her> reasoned arguments for me to refuse him
Theoretically, anything can be implemented and any problems can be solved, it all depends on
expediency. Introduction additional register for switching port sets
memory management according to different clone standards from a technical point of view
inappropriate, because is easier to implement by combining them by OR and
proportional increase in memory. From a technical point of view, this question can
arise only due to some limitations such as a lack of legs in the FPGA when
implementation of all ports in it, etc., although the limitations of the element base are not
the criterion that would justify such a decision.
It is also necessary to proceed from the tasks that are set for different implementations.
If the goal is to switch sets of ports on the fly (although it’s not very clear why
necessary), then it is unlikely that this will be accompanied by problems with the software, because no software
does not know how to do this and does not suspect the existence of such possibilities. Problems with
native ZX software can arise only if software that can
work only in exclusive mode, and if its work is interrupted for replacement
for some reason, a set of ports, after which control is transferred back to it. In this
if the program thought that it was running on a certain clone, they couldbe problems. If initialization of the selection of a set of ports is carried out between
sessions of such software, there should be no problems.
In the version with the implementation of all sets of ports at once and the division of memory, it can
be a problem only as a consequence of an incorrect type determination algorithm
clone, when the program will have to choose from several options (if
the determination process does not end after the first successful result). But this
already a crazy case: smile; .;
From
Dmitry Demyanenko
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To
All
18 October 2006
Hello icebear
Hell, if I want to use software in my Pentagon that is current with KAY or Scorp
I know how to work with the model so I need to install 64 mega memory. Stop off topic and
you can delete your message.