Turbocharger circuit + SIM connection 1MB.

Hello, All Wednesday 27 October 1999 at 17:02:00, Valeriy Kovalev tormented the keyboard, I wanted to tell you about "Z-80XXX". VK> Could you post the diagram/indicate its source? VK> I want a turbo without wait for my Pentagon :) I had to develop the circuit myself, + thanks to my friend Misha Borisov for valuable advice and information. Here is a diagram with a description and details for Pentagon computer. Turbo without wait, i.e. RAM is overclocked by 7 MHz, and speed = 200% in both ROM and RAM. I want to warn you right away that no measures have been taken here to extension of IROQ in turbo mode, but this can easily be done separately revision. I just don’t have information on the wait Z80 temporary huts. But the computer works fine in this form. Only I have AY didn’t make friends with the short IORQ (channel “B” goes silent in the turbo and the white noise generator is poorly controlled), and in some copying boots (old version of Perfect Commander, Jemeni Commander) there are glitches with changing the disk. Some modems they like to break the connection in the turbo with a short IORQ. But turbo mode can be turned on/off at any time small toggle switch. First of all, you will have to throw away the 565 series RAMs - they not even the fastest letter can handle 7 MHz, I I installed a 30pin 1MB sim module (70ns). The best processor is Z84C0010PEC - no glitches, alwayscold, but the Z8400APS gets very hot and starts to glitch with heating, but when cooled by a small fan from the PC also works without glitches. I tried to install VM1 - I have it went badly. It is also necessary to change several clock chips generator for the K531 or K1531 series. K1533 does not roll. Here's the right Current data on signal delay times: ────────────┬────────────┬───── ───────┬───────────┬─────────── 133, 155 │ 533, 555 │ 530, 531 │ 1533 │ 1531 ────────────┼────────────┼───── ───────┼───────────┼─────────── 18.5ns │ 20ns │ 4.5...5ns │ 14ns │5.16...6ns ────────────┴────────────┴───── ───────┴───────────┴─────────── That is The K530 should still be suitable, but I haven’t tried it. You also need address multiplexer chips (D16...D19) change to 1533 series, or faster. And so: First of all, you need to start replacing 565RU5 (565RU7, if you have whose memory is expanded) to the SIM module. Here is its pinout: ┌────────────────────────────── ──────────────────────────────┐ │ 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 3 │ │1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 │ ├────────────────────────────── ──────────────────────────────┤ │+ c - r ? ? + │ │5 a d a a d a a d a a d a a d a a d w d d ? a? ? 5 ││в s 0 0 1 1 2 3 ┴ 2 4 5 3 6 7 4 8 9 5 e ┴ 6 7 s ? ? in │ └────────────────────────────── ──────────────────────────────┘ The purpose of the legs marked "?" I don't remember, but they are not needed in our case. You just need a pin. Connect 28 and 29 to +5V, i.e. with pin 30, and leave pin 26 unconnected. The Sim's data inputs and outputs are combined, so he needs additional microcircuit register K1533IR22 (or better yet, immediately K531 series). ┌──┬──┬──┐ ┌──┬──┬──┐ │ │ │d0├─────▐─────┤do│ │ ├ │ │ │d1├─────▐─────┤d1│ │ ├ │ │ │d2├─────▐─────┤d2│ │ ├ │ │ │d3├─────▐─────┤d3│ │ ├ │ │ │d4├─────▐─────┤d4│ │ ├ │ │ │d5├─────▐─────┤d5│ │ ├ │--│ │d6├─────▐─────┤d6│ │ ├ "c16" ───°─°we│ │d7├─────▐─────┤d7│ │ ├ │ └──┴──┴──┘ ▐ └──┴──┴──┘ │ sim ▐ D37,D38,D39 ┌──────┘ ▐ │ ▐ │ ┌──┬──┬──┐ ▐ IR22 outputs: │ d0 ──┤d0│ │q0├───▐ │ Z d1 ──┤d1│ │q1├───▐ d0 - pin 3 q0 - pin 2 │ 8 d2 ──┤d2│ │q2├───▐ d1 - pin 4 q1 - pin 5 │ 0 d3 ──┤d3│ │q3├───▐ d2 - pin 7 q2 - pin 6 │ d4 ──┤d4│ │q4├───▐ d3 - pin.8 q3 - pin.9 │ d5 ──┤d5│ │q5├───▐ d4 - pin 13 q4 - pin 12 │ d6 ──┤d6│ │q6├───▐ d5 - pin 14 q5 - pin 15│ d7 ──┤d7│ │q7├───▐ d6 - pin 17 q6 - pin 16 │ ├──┼──┼──┤ d7 - pin 18 q7 - pin 19 │ +5v ──┤c │ │ │ c - pin 11 └──────────°oe│ │ │ oe - pin 1 └──┴──┴──┘ K531IR22 Fig. 1 Next: The mode of the roads leading to D63.1 and D63.4, which formed signals “c37” (cas0) and “c38” (cas1), disconnect pin 9 D61. Now we have one "cas" is "c15" which can be removed from pin 3 D15. We put it on the sim. At the Pentagon the D61 has a free element, we will use it, as in the diagram in Fig. 2. Now you need to assemble a circuit based on 1533KP12 to form two additional address bits, and provide regeneration. Because the Pentagon has enough signals to regenerate a 10-bit (1MB of RAM), I decided not to fry my brains on implementation regeneration according to internal Sim counters, but did standard Spectrum regeneration. To do this you need to collect the following diagram, and swap some signals to address multiplexers D16...D19, as in the diagram in Fig. 2. All address signals at the outputs of the CPshek are SIM addresses. And the addresses at the entrances are Z80 addresses (not according to the Pentagon notations, i.e. numbering starting with "0"), all other signals are given according to Pentagon notations. ┌──┬──┬──┐ ┌──┬──┬──┐ ┌──┬──┬──┐gnd ─┤a1│ │ │ +5в ─┤a1│ │ │ "b17"─┤a1│ │ │ "b15"─┤a2│ │qa├─a9 gnd ─┤a2│ │q1├─a0 "b18"─┤a2│ │q1├─a4 ┌────────┤a3│ │ │ "c35"─┤a3│ │ │ gnd ─┤a3│ │ │ │ a9 ─┤a4│ │ │ "b16"─┤a4│ │q2├─a1 +5в ─┤a4│ │q2├─a5 │ ├──┼──┼──┤ ├──┤ │ │ ├──┤ │ │ │ gnd ─┤b1│ │ │ "b1"─┤b1│ │q3├─a2 "b5"─┤b1│ │q3├─a6 │ "b14"─┤b2│ │qb├─a8 "b2"─┤b2│ │ │ "b9"─┤b2│ │ │ │ ┌──────┤b3│ │ │ "b3"─┤b3│ │q4├─a3 "b10"─┤b3│ │q4├─a7 │ │ a8 ─┤b4│ │ │ "b4"─┤b4│ │ │ "b11"─┤b4│ │ │ │ │ ├──┼──┼──┤ └──┴──┴──┘ └──┴──┴──┘ │ │"c14"─┤s0│ │ │ D16 D17 │ │"c23"─┤s1│ │ │ кD61 ┌──┬──┬──┐ ┌──┬──┬──┐ │ │ ┌─°ea│ │ │ выв9 ─┤a1│ │ │ a11 ─┤a1│ │ │ │ │ °─°eb│ │ │ ┌───────┤a2│ │q1├─a0 a12 ─┤a2│ │q1├─a4 │ │ ┴ └──┴──┴──┘ │ "c34"─┤a3│ │ │ a13 ─┤a3│ │ │ │ │ 1533КП12 │ a10 ─┤a4│ │q2├─a1 "c33"─┤a4│ │q2├─a5 │ └────────────┐ │ ├──┤ │ │ ├──┤ │ │ └────────────┐ │ │ a0 ─┤b1│ │q3├─a2 a4 ─┤b1│ │q3├─a6 ___ 1533ЛЕ1│ │ │ a1 ─┤b2│ │ │ a5 ─┤b2│ │ │ p1m ┌───┐ │ │ │ a2 ─┤b3│ │q4├─a3 a6 ─┤b3│ │q4├─a7 ────┤ 1 °─┘ │ │ a3 ─┤b4│ │ │ a7 ─┤b4│ │ │ ┌─┤ │ │ │ └──┴──┴──┘ └──┴──┴──┘_____│ └───┘ │ │ D18 D19 p512k│ ┌───┐ │ └────────────────┐ ──┼─┤ 1 °───┘ ~~~~~~~~~~ │ °─┤ │ p256k─┤a4│ │ │ │ │ └───┘ ├──┤ │q4├──┘ └──кD61 gnd ─┤b4│ │ │ pin1 ~~~~~~~~~~ Fig.2 D61 IC outputs: 1533KP12: a1 - pin.6 1533KP11: a1 - pin.2 a2 - pin.5 a2 - pin.5 a3 - pin 4 a3 - pin 11 a4 - pin 3 a4 - pin 14 b1 - pin 10 b1 - pin 3 b2 - pin 11 b2 - pin 6 b3 - pin 12 b3 - pin 10 b4 - pin 13 b4 - pin 13 qa - pin 7 q1 - pin 4 qb - pin 9 q2 - pin 7 s0 - pin 14 q3 - pin 9 s1 - pin 2 q4 - pin 12 ea - pin 1 eb - pin 15 The signals "p256k", "p512k_" and "p1m_" are the signals taken from memory expansion port triggers. For which signal - which one The extension bit does not matter. The main thing to note is Please note that "p512k_" and "p1m_" are inverse, and "p256k" are straight, i.e. in the initial state (when must be selected page 0-7 RAM) on "256k" should be "0", and on inverse - "1".Therefore, as a port trigger IC, it is best to use TM8 - it has both direct and inverse outputs. I do not provide a diagram of the port itself, because... there are many different standards, and I’m already tired of drawing. Next time I can draw it if anyone is interested. I myself I made a multiport, switchable by software. In the meantime, if this the circuit is not assembled, these three signals "p256k"... are supplied accordingly. "0", "1", "1". Only when the sim is working can you proceed to the computer turbo diagram. 1) We disassemble the crystal oscillator and sculpt it as a hinged one installation according to the diagram in Fig. 3 on Dd1 K531 LH1 or LE1 (all new mikruhi I will call you "Dd" so that there is no confusion with factory "D"). It is advisable to place it closer to D45. But just DO NOT solder IE5 on top - it does not have feeding legs match. The factory D1 should remain, preferably only this change to 1533 or faster. I have 1533. 2) We change D45 (TM8) to the K531 series, cutting almost all the roads, coming to her. The pins must remain connected. 2 and 3 (outputs q0 and q0_), and of course the supply ones;), and we do everything as according to the diagram in Fig. 3. 3) Solder K531TV9 Dd2 on top of D45. 4) Disconnect outputs D2 (IE5), leaving only output. "1" (pin 12), and exit. "8" (pin 11), going to the AY connection diagram. 5) Disconnect pins 8 and 9 of D1. 6) Of course, disconnect the “clk” pin of the processor.7) Disconnect the signal “c14” from the KPshek (D16...D19, KP12 in memory expansion circuit), we supply "c14'" instead, formed on mikruha 555! series is necessary delay. On "ras" RAM should still be "c14" without delays. 8) Assembling the diagram: Attention! Everything must be assembled as in the diagram, in including the signal "c1" from the direct output Dd2.2 through inverter Dd1. It has been verified in practice that if you remove this signal from inverse output. Dd2.2, then due to the increased load on Dd2.2 chip, the delay of this signal increases, and The computer starts to malfunction. 470pf Dd1 ┌─┤├─┤ ┌───┐ │ ┌─────┤ °──°── "c1" │ └───┘ to D41,D42 │ vyv.9 14MHz +5v Dd2.2 │ +5v Dd2.1 ┌────────┤█├────────┐ │ ┌─┬──┬─┐ │ │ ┌─┬──┬─┐ │ │ °─┤j│ │ │ │ °─┤j│ │ │k D3vyv5 │ ┌───┐ ┌───┐ │ ┌───┼─┤c│ │q├─┘ ┌─┼─┤c│ │q├── °──┤ °──°──┤ °──°───° °─┤k│ │ │ │ °─┤k│ │ │ │ └───┘ │ └───┘ │ │ │ ├─┤ │_│ │ │ ├─┤ │_│k D5vyv3 │ Dd1 _│__ Dd1 │ │ °─°s│ │q°───° °─°s│ │q°─°─ └───────┤____├──────┘ │ └─°r│ │ │ │ └─°r│ │ │ │R1 1k │ └─┴──┴─┘ │ └─┴──┴─┘ │ │ │ ┌──────────┘ Dd3 │ ┌──────────────────────°────────────° │ ┌──┬──┬──┐ │ │ D45 │ │ └─┤a1│ │ │clk Z80 │ │ ┌──┬──┬──┐ │ └───┤b1│ │q1├── │ └──┤do│ │q0├──"c26" °──"c15"(cas) ├──┼──┼──┤ │ ┤d1│ │q0°─°─ "c14" │to D15vyv3, ┌───┤s │ │ │ │ ├──┤ │ │ │ │ vyv11 │ ┌─°oe│ │ │ °──────┤c │ │q1├ │ │ │ ┴ └──┴──┴──┘ │ +5v──°r │ │q1° │ │ └──────────────┐ │ └──┴──┴──┘ │ │ +5v ─°────┐ │ │ ┌────────────┘ │ │ │ Dd4 │ │ │ ┌────┐ │ ┬ 10k █ │ ┌─┬──┬─┐ │ │ └──┤ 1 ├───"c14'" │sa1/ │ °──°r│ │q├ │ │ ┌──┤ │ │ └─────°────┼──┤d│ │ │ │ │ ┴ └────┘ │ ┌────┐ ┌─┼──┤c│ │_│ │ │ 555LL1 └───┤ 1 ├───┘ └──°s│ │q°──┘ │ "c40" ──┤ │ └─┴──┴─┘ └───on D2(IE5) (from D15 pin 6)└────┘ pin 1 LL1 fig. 3 Microcircuit pins: sa1 - turbo on/off Dd2) Dd2.1 j - pin 3 Dd2.2 j - pin 11 c - pin 1 c - pin 13 (531TV9) k - pin 2 k - pin 12s_ - pin 4 s_ - pin 10 r_ - pin 15 r_ - pin 14 q - pin.5 q - pin.9 q_ - pin.6 q_ - pin.7 Dd3) a1 - pin 2 b1 - pin 3 (531KP11) s - pin 1 oe - vyv.15 q1 - pin 4 Dd4) r - pin 13 (1) d - pin 12 (2) (531TM2) c - pin 11 (3) s - pin 10 (4) q_ - pin 8 (6) May require precise adjustment of supply voltage computer, but some glitches that appear are eliminated by adjusting R1. It has been verified that at a reduced voltage of even 0.5 V, Immense glitches begin due to changes in duty cycle pulses of a quartz oscillator, and here the duty cycle has great importance. The PC unit showed excellent results food, I didn't even have to find out if it contained +5V adjustment A 470pf condenser suspended from the "c1" signal is needed for fatigue the resulting discrepancy in the timing of attributes and pixels. But if the Dd1 inverter is made on the 555 series, then the converter can won't be needed. And finally the last thing: You just need to do it duration of the INT signal, otherwise in turbo it becomes too long. LE1 Dd4 (TM2) ┌───┐ ┌─┬──┬─┐ "b7"──┤ 1 °────────°r│ │q├ ┌─┤ │ ┌──┤d│ │ │ │ └───┘ ┌─┼──┤c│ │_│ └───────┐ │ °──°s│ │q°───int_Z ┌───┐ │ │ │ └─┴──┴─┘ 8 m1_ ──┤ 1 °─┘ │ └─ +5v 0 iorq_ ──┤ │ │ └───┘ └──with D5 pin.8 Fig.4 LE1 With this scheme you can forget about the problem once and for all duration of INTa, because it will always be cut off as soon as The Z80 will respond to it. In case of disabled interrupts, INT stops with the arrival of the signal "b7". Well, that seems to be all. If anyone doesn't understand something, ask. Don't remember it badly, All! Dale