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Thoughts on memory

ZXNet echo conference «hardware.zx»

From Mike To All 14 December 2006

Hello, SfS SfS> Here and on the unwritten forum there was a lot of arguing about “how much is needed SfS> memory spectrum." SfS> SfS> The reality is that now it is much easier to buy large memory SfS> volume - 4M, 32M, etc., than find RU7. SfS> SfS> Since only two clones are currently being produced (ATM and Pentagon1024), SfS> developers can easily agree and reserve ports for SfS> memory expansion, and not argue about how much of it is needed. One fig - SfS> soon a dynamic RAM chip with a capacity of less than 1 MB (or not SfS> soon and already?) will not be available. SfS> SfS> Therefore, I propose to allocate two ports for selecting each page in SfS> each window. This will allow you to address 65536 * 16KB = 1GB of RAM. SfS> SUCH amount of RAM on the spec is, of course, unlikely to be achieved, but SfS> at least problems "how should I address memory, I have RAM SfS> with a volume of 32 Mega, and the standards support no more than 4 Mega" - SfS> will not occur.SfS> SfS> And RAM disks with many megabytes will not hurt, nor will disk caches. SfS> SfS> In general, the thought is this - since memory is cheap, then give it to it SfS> to use, and not to limit yourself artificially. +1 No, not even +10!!! :v2_clapp:

From SfS To All 14 December 2006

Hello, All Here and on the unfinished forum there was a lot of arguing about “how much does the Spectrum need? memory". The reality is that now it is much easier to buy memory for a large volume - 4M, 32M, etc., than to find RU7. Since only two clones are currently being produced (ATM and Pentagon1024), it is quite possible for developers to come to an agreement and reserve ports for expansion memory, and not argue about how much it is needed. One fig - soon a microcircuit there will be no dynamic RAM with a volume of less than 1 MB (or not soon, but already?) get it. Therefore, I propose to allocate two ports for selecting each page in each window. This will allow you to address 65536 * 16KB = 1GB of RAM. THIS amount of RAM per spec, of course, is unlikely to be achieved, but at least the problems “how should I address memory, I have 32 Mega RAM, but the standards do not support more than 4 Meg" - will not occur. Yes, and multi-megabyte RAM disks won’t hurt, nor will disk caches. In general, the thought is this: since memory is cheap, then let’s use it, and not limit yourself artificially.

From SfS To All 14 December 2006

Hello Romanich > Such amounts of memory, IMHO, are also useless... > Memory up to a megabyte is enough for games What does this have to do with games? I'm just saying that memory costs a penny. Well, tell me - with what Will it hurt you if you have 32M RAM? For me it's good - I’ll download applications, residents, and create RAM disks for speed. Anyone else and the file system cache will register... > But it’s worth looking for a processor with linear addressing up to a megabyte smile; Any; Workstation - up to 4 Gig linear addressing... But what does Spectrum have to do with it?

From Pavel Fedin To All 14 December 2006

Hello Romanich Rom> I agree, but I think we should strive to implement something like this Rom> the principle in iron engineering is to install only what is needed and how much Rom> needed That's right. We’re just talking about the fact that in our time one microphone already has 4 MB. A You'll soon get 1 MB - that's all. We will still bet 4, and the rest 3 will they be floating in the air? What's the point of them hanging around in the air if you use them? they cost practically nothing?

From Pavel Fedin To All 14 December 2006

Hello Romanich Rom> Such amounts of memory, IMHO, are also useless... Rom> Memory up to a megabyte is enough for games Rom> I agree with you in the sense that only 1 MB has been mastered so far, and that’s not potential is far from exhausted. But sfs is right that the memory is still free. > But it’s worth looking for a processor with linear addressing up to a megabyte > :smile; >; Z180? :smile; Or; can move away from the traditional direction and really go into FPGA and develop the CPU architecture yourself? Weakly scalable-percent with translation from 8 bit to 32 bit? A kind of fantasy on the topic “what would the Zx80 series be like if x86 won" :v2_finge:

From Roman Dubinin To All 14 December 2006

Hello, SfS SfS> Well, tell me, what will hurt you if you have 32M RAM? SfS> It will hurt that the most significant address bits of the CPU could have been spent on decoding periphery! Apparatus engineering must be approached primarily from a rational point of view vision. If you are not supposed to use it that much, then why is it needed? Not for the same thing, so that someone, like the windows and penguins, grabs all my memory... SfS> Any workstation - up to 4 Gig linear addressing... But what does it have to do with it SfS> Spectrum ? I didn’t mention the spec at all... AWP... it’s just as crap as the AVRs - there is no external code memory (for most - especially atmel) Here LPC22xx is another matter ;)

From Roman Dubinin To All 14 December 2006

Hello, SfS Such amounts of memory, IMHO, are also useless... Up to a megabyte of memory is enough for games But it’s worth looking for a processor with linear addressing up to a megabyte :smile; Who; prevented the same Atmel people from making AVRs with external code memory and linear addressing at least up to 1MB? But no, it’s more profitable for them for people to shit during these controllers thousands of times and threw them away. Especially for example Atmega128 programmed via serial interface for how long (if the size firmware takes up almost the entire crystal) Therefore, slightly different principles are needed here! For example, it is worth considering controllers from Mitsubishi - they are 16-bit... As opposed to armies - less monstrous...

From Roman Dubinin To All 14 December 2006

Hello Sonic Son> But sfs is right that the memory is still free. Son> I agree, but it seems to me that we should strive to implement such a principle in iron building - install only what is needed and how much is needed :smile; At; this, of course, to make such resources so as not to be bent over from them lack! Son> Z180 ? :smile; Son>; Z180 is missing for me :frown; Son>; Or it can move away from the traditional direction and really go into Son> FPGA and develop the CPU architecture yourself? Weakly scalable-percent Son> with conversion from 8 bits to 32 bits? A kind of fantasy on the topic “what it was like Son> the Zx80 series would have won if the x86 had won" :v2_finge; Son>; Who do you think is more numerous - those who know controllers/processors or those who who knows how to program FPGAs??? As the results showed, it is possible to emulate processors on FPGAs, but there will still be differences equally.... especially since it smells of some kind of rubber (C) Costa It’s better to immediately make your own percentage with your own architecture ;)

From Roman Dubinin To All 14 December 2006

Hello Sonic Son> And you’ll soon get 1 MB of horseradish - that’s all. We will still put 4, but Son> will the remaining 3 dangle in the air? And their meaning is in the air Son> hang around if it costs practically nothing to use them? Where have you seen SRAM chips with a capacity of more than 0.5MB? IMHO SRAM has the most convenient tire organization, so I consider DRAMs as hymoria...

From Mike To All 14 December 2006

Hello Romanich Rom> Such amounts of memory, IMHO, are also useless... Rom> Memory up to a megabyte is enough for games I fundamentally disagree. This is a saying from the region - 640 is enough for everything. I I don’t argue that with 1Mb you can do well, but that doesn’t mean that enough for any idea. And we are talking about the fact that now bet a larger volume on much simpler than not big. Rom> But it’s worth looking for a processor with linear addressing up to a megabyte Rom> :smile; If; will it be fully compatible with the Z80, then yes. Rom> Who prevented the same Atmel people from making AVRs with external code memory and Rom> linear addressing at least up to 1MB? But no, it’s more profitable for them that the people Rom> crap into these controllers thousands of times and throw them away. Moreover, for example Rom> Atmega128 is programmed via the serial interface uuuh as Rom> long (if the size of the firmware occupies almost the entire chip) Rom> Rom> Therefore, slightly different principles are needed here! For example, it’s worth Rom> consider controllers from Mitsubishi - they are 16-bit... Rom> As opposed to armies, they are less monstrous...This is all great, but how do they relate to spec? Spec is a Z80 and everything that is compatible with it. Unless you look towards the Z180, Z380, eZ80 and stuff like that.

From SfS To All 14 December 2006

Hello icebear ice> Is the M55 also an ARM9? It seemed to me ARM7TDMI. yes. Sorry. I peed myself. 55800 - ARM7.

From Roman Dubinin To All 14 December 2006

Hello, SfS SfS> So I don’t understand what you’re trying to say... SfS> Everything is clear. I just looked at the problem from a different angle. But the problem is not Speck resisted ;)

From Roman Dubinin To All 14 December 2006

Hello, SfS SfS> By the way, discover that now there is dynamic memory SfS> inside, but having a static interface outside. SfS> I know! I wish I could see more of these crystals :)

From Pavel Fedin To All 14 December 2006

Hello icebear ice> Magic files are the same, and even the registers are in place. Yeah, but often they are in place of data or program code... Although in theory you are right. In the modern world this is called Hibernation.

From Pavel Fedin To All 14 December 2006

Hello Romanich Rom> Where have you seen SRAM chips with a capacity of more than 0.5MB? Rom> IMHO SRAM has the most convenient bus organization, so DRAMs Rom> I consider it a gimora... SRAM is cool IMHO not because of this, but because the SRAM-based machine can be turned off, then turn it on, and everything will remain as it was except for the CPU registers, and of course There is no need to turn off the SRAM power either.

From Dmitry Vasilievich Terentyev To All 14 December 2006

Hello, SfS It’s clear that you need to agree in advance on an additional memory port in order to then there were no extra hemorrhoids. And about the fact that such a memory is needed or needed, another conversation. Previously, there were also disputes about the need for a megabyte. What is called: "A holy place is never empty."

From SfS To All 14 December 2006

Hello Romanich Rom> It is affected by the fact that the most significant address bits of the CPU could be spent on Rom> peripheral decoding! Rom> Brrr... Are you talking about the Z80 or what?! In Spectrum ALL address bits (16 pieces) are occupied for memory. All computers except Spec-48 use page organization memory. For peripherals (in the sense of I/O ports) there is a separate address 64K space. So I don't understand what you're trying to say at all. I'm just I just proposed introducing a standard for memory management ports above 128k and that’s it. Moreover, the standard immediately provides for the possibility of expanding memory to any reasonable limits to resolve this issue once and for all. Rom> Apparatus engineering must be approached primarily from a rational point of view Rom> view. That's it. And since there is less than a few megagrams of dynamic memory per Today there is almost none, then it is rational to use what is completely available. Rom> If you are not supposed to use that much, then why is it needed? Not Rom> for the same reason, so that someone, like windows and penguins, snatches usya Rom> memory... What does "not expected" mean? This is a computer, not a highly specialized device.on the controller. The user will find what to do with memory... And programmers will find him will help :) And the expansion of the graph. The possibilities will be reduced by increasing the amount of RAM. Rom> I didn’t stutter at all about spec... AWP... it’s just as crap as yours Rom> AVRs - no external code memory (most - especially Atmel) I have an AT91RM9200 (ARM9 core) and an AT91M55800 (ARM9 core) on my desk - both They have external code memory and Linux runs on both of them. And both are from Atmel. Take any - and go ahead. It is only the AT19SAM** series that does not have an external code memory. So it’s understandable - that’s not what this series was designed for.

From SfS To All 14 December 2006

Hello Romanich Rom> Where have you seen SRAM chips with a capacity of more than 0.5MB? Rom> IMHO SRAM has the most convenient bus organization, so DRAMs Rom> I consider it a gimora... I saw it on my desk :) It’s called K6X8016C08. 55ns 1MB. By the way, discover for yourself that now there is a dynamic memory inside, but having a static interface on the outside. It's called PSEUDSRAM. It's inexpensive The volumes are many megabytes, one minus is that almost everything is in BGA cases. In general, the memory in the spec is dynamic. So that's what we're talking about.

From Andreas Kaiser To All 14 December 2006

Hello Sonic Son> SRAM is cool IMHO not because of this, but because you can have a car based on SRAM Son> turn it off, then turn it on, and everything will remain as it was except Son> CPU registers, and of course, you don’t need to turn off the SRAM power either. Magic files are the same, and even the registers are in place.

From Andreas Kaiser To All 14 December 2006

Hello, SfS SfS> I have AT91RM9200 (ARM9 core) and AT91M55800 (ARM9 core) on my desk SfS> - both have external code memory and Linux runs on both of them. Is the M55 also an ARM9? It seemed to me ARM7TDMI.

From Mikhail Andreev To All 14 December 2006

Hello icebear ice> Magic files are the same, and even the registers are in place. On my Sim, you can safely turn it off for 5-10 seconds, everything is in place remains.. I didn't look at registers. I have to try it.

From Valery Tkachuck To All 15 December 2006

Hello MegaMyth The issue of memory capacity has been discussed many times. Here's the last one: http://zx.pk.ru/showthread.php?t=4225&page=2&pp=10 I consider 16M to be the minimum volume that you should focus on when development of a memory manager. I think the discussion needs to be carried out in several stages: 1) discussion of proposals for the selection of ports; 2) discussion from the point of view of architectural implementation of proposals for options medical notification of pages, as well as the ability to disable ROM; 3) jointly checking the selected option for possible problems with the software (including eliminating the possibility of using two options in the software memory management for older computers). Therefore, first, please speak on the minutes of the discussion, so as not to turn this is in 101 flamedrome, as has happened more than once. After the protocol is approved, everything The discussion should be carried out strictly according to the protocol. All "brilliant thoughts" not related to the issue under discussion, please accompany the authors with the appropriate title followed by their discussion outside the protocol in auxiliary threads with including the results of the discussion in the parent topic. An example of a “brilliant thought” not according to the protocol: Proposal according to claim 1; V; Ideally, you should start with a simple summation of all existing ports standards, i.e. KAY, Profi, Pentagon, because they had similar architecture.Accordingly, this proposal should be discussed either in parallel with the protocol, if he was suddenly overlooked, or as a matter of protocol, when his turn comes. In this case - when discussing point 1. So, now please speak on the record.

From Valery Tkachuck To All 15 December 2006

Hello hero If you have a ready-made solution, express it.

From Dmitry Demyanenko To All 15 December 2006

Hello, Black_Cat Well, someone has to be first. STOP PROVOKING FLAMES!!!

From Valen Consulovich To All 15 December 2006

Hello MegaMyth Sorry for the offtopic! Meg> Currently I am designing a ZX clone (based on the Sprinter principle). SRAM memory Meg> 2*512KB-15ns (2 pieces 180Ru), scanning immediately VGA 75Hz (although not Meg> I deny that there will be support for the RGB PAL encoder (completely Meg> timings are programmed). Meg> ... Please create a separate thread about your clone (info, parameters, etc.). I think everyone will be interested.

From Pavel A. Ivanov To All 16 December 2006

Hello Valen Val> Please create a separate thread about your clone (info, parameters, etc.). Val> I think everyone will be interested. That's what I did... at least I took my mind off the board layout :-) http://zx.pk.ru/showthread.php?t=4381

From SfS To All 16 December 2006

Hello MegaMyth Meg> or just make a memory manager like on ATM (any page of RAM Meg> in any quarter). Or something else. Regarding DRAM vs SRAM; Now; Meg> I am designing a ZX clone (based on the Sprinter principle). IMHO, this is definitely necessary. Otherwise, several windows will be lost or abandoned. processor address space.

From SfS To All 16 December 2006

Hello, SfS I’ll formulate it point by point: 1. For each window of the CPU address space, two ports (16 bits) are allocated for the page number included in the window. This allows you to address up to 1GB of memory (65536 pages of 16KB). 2. The addresses of these ports must be determined by the developers of ATM and Pentagon 1024. Since these clones are the only ones that are currently being produced, they are the cards in hands. That's actually my entire proposal.