The flop controller is not working.

Hello All! I've been fiddling with it for a week now - to no avail. The main thing is that the scheme is simple - no PLM, everything is logical. True, the computer (atas256) is on ULA. ULA receives CLK from LH1+quartz16MHz, and issues CLK4 to the flop controller (to itself VG93 is supplied for synchronization (24 leg) signal WAIT). In general, it does not read floppy disks at all. When formatting, it takes 14 seconds for each track (2 sides). Then it displays something like 2544/2544, but the subsequent LIST writes error right away. As I understand it, you need to dig the reading circuit. It is simple here, TM8 - LA3 - IE7. I looked at it with an oscilloscope. All signals however pass through and reach legs 26 and 27 VG93. IP passes. There are IRQ and DRQ, and so is sampling for reading their port. I tried a lot of flops - they are not dead. VG93 also installed different ones, some of them had to be working. So why might it not work? Best regards, Evgeniy.

████ OS/2 Greetings, Eugene! On Friday October 29, 2004 (then it was 05:53:26) Eugene Palenock in his letter to All wrote: EP> I've been fiddling with it for a week now - to no avail. EP> The main thing is that the scheme is simple - no PLM, everything is based on logic. EP> True, computer (atas256) on ULA. [skip] EP> I tried a lot of flops - they are not dead. EP> VG93 also installed different ones, some of them had to be working. EP> So why might it not work? Have you checked the output buffer elements? I once had such symptoms when _partial_ dying of LH2 and LP9 (the very first, classical, scheme controller). Best regards, Felix. [I.ZX]