Modern ZX-Spectrum hardware

ZXNet echo conference «hardware.zx»

From Eugene Palenock To All 30 August 2000

Hello All! There are several questions regarding the subject: - what bits should the cache be decrypted by? - cache 32kb - what did you decide? Was it installed on 7FFD or EFF7? - what is D0 responsible for in the EFF7 port? Where can I find a program description? - D2 - upper memory, D3 - turbo, D5 - DOS ports, D7 - clock. It's like that for everyone Or is there something else on these bits? - What should D4 actually do in EFF7? Enable additional screen from upper memory (by the way, where is it located?) or hardware flash 5 and 7 screens? - What is connected to D6? - How does Turbo mode work? Why does it slow down in RAM and not slow down in cache? It adds Wait to every odd-clock instruction when working in RAM or Is there a different braking algorithm? - does cache-16 work instead of both BASICS? - and if you make call #1d13 from the cache, will TRDOS work? - and if you then return via RET to #0000-#3FFF - what will happen? ROM TRDOS, and cache will return when the program exits above #3FFF ? PS. I don't have cache or turbo yet... * Originally written in HARDWARE.ZX *Copied to REAL.SPECCY Best regards, Evgeniy.

From Kirill Frolov To Eugene Palenock 31 August 2000

Press RESET immediately, Eugene! 30 Aug 00 23:13, Eugene Palenock wrote to All: EP> - what bits should the cache be decrypted by? For normal operation of MOD-Player by Cobra only via A2. And for normal work with programs for GS, create more addresses to your liking... EP> - 32kb cache - what did you decide? Was it installed on 7FFD or EFF7? According to 7FFD. There are no free bits on EFF7. EP> - what is D0 responsible for in the EFF7 port? Where can I find the software EP> description ? Hardware multicolor. EP> - D2 - upper memory, D3 - turbo, D5 - DOS ports, D7 - clock. This is y EP> everyone like this or is there something else on these beats? It seems like D2 is 512x192 :-/ I don’t remember, look in the MadROM help. I only have 512x192 and memory locking implemented. Hours are always available without any perversions - it’s simply not necessary and even rather harmful. EP> - And what should D4 actually do in EFF7? Include EP> additional screen from the upper memory (by the way, where is it located?) EP> or hardware flash 5 and 7 screens? And, sure enough, there was also a hardware flasher hanging on some bit. EP> - What is connected to D6?Look for the REAL.SPECCY archive for two years and you will find out everything... ;-( EP> - How does Turbo mode work? On different machines it’s different. In the Pentagon this is done via ()() and slow. EP> Why does it slow down in RAM and not slow down in the cache? Because the video controller has its own data bus, but they share DRAM with processor. So they divide, the processor slows down. And the cache hangs on the bus processor and is available at any time. EP> It adds Wait to every odd-clock command EP> when working in RAM or is there some other braking algorithm? This is on the yellow scorpion, NOT IN TURBO MODE. And the delay algorithm is simple - if the RAM is occupied by the video controller, then The processor is waiting. EP> - cache-16 works instead of both BASICS? Yes. EP> - and if you make call #1d13 from the cache, will TRDOS work? ^ 0x3d00..0x3dff The TR-DOS port will turn on. This may cause problems during startup CP/M program... ROM TR-DOS WILL NOT CONNECT (CACHE REMAINS). EP> - and if you then return to #0000-#3FFF via RET - what will happen? ROM EP> TRDOS, and the cache will return when the program exits above #3FFF ? See above. EP> PS. I don't have cache or turbo yet... And I don't have a turbo. *Crossposted in REAL.SPECCY

From Alexander Araktcheew To Eugene Palenock 1 September 2000

Reply-to: 500:8362/1.10@ZXNET Greetings, Eugene! Somehow Thu 31 Aug 2000 at 02:21:18 Kirill Frolov and Eugene Palenock discussed Modern ZX-Spectrum hardware. Well, I decided to butt in... EP>> - what bits should the cache be decrypted by? KF> For normal operation of MOD-Player by Cobra only on A2. KF> And for normal work with programs for GS, create more addresses for KF> taste... You can limit yourself to adding A6. EP>> - cache-32kb - what did you decide? Was it installed on 7FFD or EFF7? KF> By 7FFD. There are no free bits on EFF7. Hanging everything that is daddy on #EFF7 is imho a big perversion. Well, turning on advanced graphics doesn’t fit in at all (it’s necessary turn on/off once from the program), lock the upper memory (must enable only the user before starting the program) and cmos (must be done all the time turn on/off). These devices know nothing about each other and only they say nasty things to each other. EP>> - what is D0 responsible for in the EFF7 port? Where can I find the software EP>> description ? KF> Hardware multicolor. Flies with the next letter. The scheme for the Pentagon was made two years ago and works great for ScorpioI haven’t tested it myself, but it was developed by a person about 3 years ago. Moreover, according to these schemes, there is some suspicious silence in all echoes/logs, whereas about 512x192 they have already written on every corner more than once. It's all strange... EP>> - D2 - upper memory, D3 - turbo, D5 - DOS ports, D7 - clock. This is y ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ It’s a complete perversion to broadcast on #EFF7 like this software switches... EP>> everyone like this or is there something else on these beats? KF> I think D2 is 512x192 :-/ I don’t remember, look in the MadROM help. D0 - Multicolor (It seems, judging by fragmentary information, it should contain also 16ink/16paper. That's how I did it.) D1 - 512x192 (For Pentagon and Scorpio it definitely is.) D2 - top memory. (IMHO the biggest insanity, maybe 99.9999 prog when applying to cmos they write to port 0 with all the consequences.) D3 - f.z. (But if it's a turbo, then almost no one uses it, so look at this description for D2.) D4 - interlace screen5/7 (Assembled it myself, tested it. Conclusion - insanity and unworthy attention, especially since no one supports.) D5 - f.z. D6 - 384x304 (In color as a standard screen. The scheme is currently available only for Pentagon. It doesn't look bad, it's supported by ANSIViewer.) D7 - CMOS (It is better not to connect, but on some computers there will sometimes beMemory cells are locked when the power is turned on. Fixed shamanic dances.) KF> I only have 512x192 and memory locking implemented. Hours are always available KF> without any perversions - it’s simply not necessary and even rather harmful. EP>> - And what should D4 actually do in EFF7? Include EP>> additional screen from the upper memory (by the way, where is it located?) EP>> or flash 5 and 7 screens in hardware? KF> Oh, sure, there was also a hardware flasher hanging on some bit. There it is. Bullshit. It's better to build 384x304. EP>> - And what is connected to D6? KF> Look for the REAL.SPECCY archive for two years and you will find out everything... ;-( Imho it's free, but AloneCoder put 384x304 there. All the best, Eugene! Alexander aka Arc of RLDG.