ISA Video on SMUC

Greetings, All! Is it possible to use an ISA video card, for example EGA, by plugging it into the ISA connector on the SMUC? It would be nice to have a good text screen... How is such a card programmed? Does she need crawl into the computer's memory for data or output through ports? [REAL ZX]

Hello Nikolaj! 13 Dec 02 19:08, Nikolaj Amosov -> All: NA> Is it possible to use an ISA video card, for example EGA, NA> by plugging it into the ISA connector on the SMUC? It's possible. A friend of mine did it. Video pages were projected from address 0. i.e. you write to ROM and it goes into video memory. You need to set a register for latching high addresses (A12-A19 is probably enough) and a signal conditioner /MEMWR. IR23 and ID7 will be quite enough. Well, LL1 may still be there. Select the register address so that it does not conflict with either SMUC itself or the video card. NA> It would be nice to have a good text screen... NA> How is such a card programmed? Does she need NA> access the computer memory for data or output through ports? The PC has 640 kB of RAM for programs; different ROMs are projected to addresses from 640 to 1024 devices, BIOS, video BIOS and video memory. Video Page Projection Window = 16 kb. There are 1 to 4 video pages in CGA-EGA cards, they are switched through ports. There is no more than 64 KB of memory on EGA cards. I have one lying around here, on There are 8 analogues of RU5. WBR, Jason. /*e-mail: jason2000(scary dog)yandex.ru ICQ: 62235830*/ /np:/ *silence*

Press RESET immediately, Valerij! 16 Dec 02 09:24, Valerij Kozhevnikoff wrote to Nikolaj Amosov: VK> The PC has 640 kB of RAM for programs In IBM-XT. IBM-AT already assumes the presence of an i80286 processor and a protected mode. And starting from i80386 it’s all emulation... VK> Video page projection window = 16 kb. 64kb. One segment in real mode. This is the address window for accessing video memory, high part of the address (if the amount of video memory exceeds 64kb) set via ports. Addresses are allocated to 128kb: 0xa0000 - 0xbffff video memory 0xc0000 - 0xdffff Video adapter ROM Memory usage by various video adapters: Adapter Video memory addresses CGA 0xb8000 - 0xbbfff ; 4kb one page 80x25 in color MDA/Hercules 0xb0000 - 0xb0fff ; 2kb 80x25 monochrome [E,V]GA mono text 0xb0000 - 0xb7fff ; 32kb several pages [E,V]GA color text 0xb8000 - 0xbffff ; 32kb several pages [E,V]GA graphics 0xa0000 - 0xaffff ; 64kb It is possible to program the adapter only through the ports, but in this regard there are some doubts... In addition, you need to somehow switch the video from Spectrum and from the adapter, the adapter itself will need to be programmed to television scanning frequency.Addresses of registers of video adapters available through ports: CGA adapter: 0x3d4-0x3d5 (6845 compatible), 0x3d8-0x3da. MDA/Hercules adapter: 0x3b4-0x3b5 (reg. 6845), 0x3b8-0x3bc. EGA adapter: 0x3c0-0x3cf, 0x3b4-0x3b5 and 0x3d4-0x3d5 (reg. 6845), 0x3ba-0x3bc and 0x3da-0x3dc. The EGA adapter can use a second bank of addresses (when installing a jumper on the adapter board). In this In this case, the addresses will be in the range 0x2c0-0x2df. VGA adapter: 0x3c0-0x3cf, 0x3b4-0x3ba and 0x3d4-0x3da (MDA and CGA emulation). All of the listed adapters emulate the operation of a display controller 6845, which allows you to work with them exclusively through ports 0x3b4-0x3b5 or 0x3d4-0x3d5. EGA adapter is backward compatible with CGA adapter, VGA emulates CGA and MDA/Hercules adapters. The CGA adapter requires that it be written to video memory was carried out exclusively at the moment of the return stroke of the beam, otherwise All sorts of unwanted video effects appear. In addition, MDA/Hercules and CGA adapters do not have the ability to load a font into a character generator and without hardware Russifications (ROM replacements) cannot display Cyrillic alphabet characters. SMUC controller of a Scorpion computer when accessing an ISA device port connector sets the device address on the ISA bus as follows: ISA Address (bits)A9 | A8 | A7 | A6 | A5 | A4 | A3 | A2 | A1 | A0 ----+----+----+----+----+----+----+----+----+----- 0 |cp.2|cp.1| a4 | a3 |a14 |a13 |a10 | a9 | a8 (in the bottom line is the address on the Spectrum bus) cp.1 and cp.2 are bits 1 and 2 (counting from zero) of one of the register SMUC controller available for writing and reading. Bit A9 of the ISA bus address or always set to zero, or perhaps controlled through one of ports of the SMUC adapter, but this is only a guess (see below one of my letters to this echo). If bit A9 is always set to 0, then without modification of SMUC controller, it is only possible to use an EGA video adapter with an address bank 0x2c0-0x2df. If bit A9 can be set to 1 by software, then it’s possible use of VGA, CGA, MDA or Hercules adapters, and possibly also some others, including SVGA. VK> There is no more than 64 KB of memory on EGA cards. It happens. Up to 128kb. My old letter: = Iron Spectrum (500:812/1.507) ============================= HARDWARE.ZX = Msg : 1291 of 1297 Snt Loc Scn From : Kirill Frolov 500:812/1.507 17 Jul 02 21 To : All 17 Jul 02 21 Subj: SMUC unknown ports ===================================================================================Press RESET immediately, All! Below is the breakdown of SMUC ports. Questions indicate ports unknown purpose. Signal A9 is not output to the ISA bus, which also seems strange. It would be nice if anyone with a real piece of hardware clarified the conditions for selecting the controller (IMHO I'm there added extra signals) and the purpose of unidentified registers. There are questions: when accessing which ports, reading and writing occurs in IDE drive registers -- when accessing the shadow register containing upper 8 bits of the data bus drive, or when accessing the low-order part of the data register? What serial EEPROM chip (connected via I2C, small such, 8-pins) installed in the SMUC controller? 256 bytes or more? There is an assumption that the same thing is written inside that is written in sector 15 tr-dos disk. That is, autoloading can be done not only from the disk, but directly from eeprom. Where is the alarm output (interrupt, that is) of the RTC chip (512VI1) connected? aka "CMOS")? On IRQ0 of the interrupt controller? Where are IRQ1,2,3 connected? ? Are interrupts (IRQ2-IRQ7) sent somewhere from the ISA slot? Must go on PIC (type 580BH59 interrupt controller). CONTROLLER SELECTION CONDITIONS: { a0=0 } AND { a1,a5,a7,a11,a12=1 } AND {trdos active} | | ! ISA-BUS ADDRESSES: | ! a8,a9,a10,a13,a14,a3,a4 isa/ide/pic address (A0-A6) | |+- a6=1 access to ISA slot | | (!) INFLUENCE OF A13 ON THESE PORTS IS UNKNOWN! | | | +- a2=1 | | | | | | | | +- a15=1 ??? (ISA A9 ?) UNKNOWN REGISTER | | | | | | | +- a13=1 ??? | | | | | | | +- a13=0 ??? | | | | | | | | +- a15=0 isa bus ports rw | | | isa address bits(A9-A0): (cp==control port bit) | | | { ? (0), cp.2, cp.1, a4, a3, a14, a13, a10, a9, a8 } | | | | | +- a13=1 ??? | | | | | +- a13=0 ??? | | | | | +- a2=0 ??? | | | +- a15=1 ??? UNKNOWN REGISTERS | | | | | +- a13=1 ??? | | | | | +- a13=1 ??? | | | +- a15=0 ??? | | | +- a13=1 ??? | | | +- a13=0 ??? | | +- a6=0 access to SMUC devices | | +- a2=1 access to IDE and PIC controllers | | | | | +- a15=1 ide controller ports | | | | | +- a13=1 ide interface registers rw | | | | | +- a13=0 shadow ide register rw ? | | | | | +- a15=0 interrupt controller register block rw | | | +- a13=1 | | (what is the impact of this bit)| | ( на работу SMUC и контроллера ) | +- a13=0 ( прерываний? неизвестно ) | | +- a2=0 | | +- a15=1 rtc/control port | | | +- a13=1 control port | | + bit0 isa/pic/ide reset (0 active) wo | | + bit1 A7 ISA wo | | + bit2 A8 ISA wo | | + bit3 enable interrupts from pic (1 active) wo | | + bit4 SDA out wo | | + bit5 write protect NVRAM (1 active) wo | | + bit6 write SCL, read SDA rw | | + bit7 0=(rtc read, ide command register block), | | 1=(rtc write, ide status register block) wo | | | +- a13=0 rtc port | control port bit7=0 write address, read data | control port bit7=1 write data | | +- a15=0 fdd status port rw + bit7 1=drive A: real disk, 0=emulated + bit6 1=drive B: real disk, 0=emulated ro = read only rw = read and write ps: табличка портов от Jason'а у меня есть... -+- [ZX] + Origin: на пц мы ставим крест, speccy поколенье next! (500:812/1.507)

Hello Nikolaj! 20 Dec 02 21:45, Nikolaj Amosov -> Kirill Frolov: KF>> But faster than in 512x192 mode (8x8 pixels per character KF>> is drawn faster). B KF>> turbo mode is quite usable. NA> I checked - filling the entire screen for about two seconds in turbo NA> mode. Displayed directly, without any line transition signs NA> columns. 8-() I don’t believe it!!! Is it with attributes? Attribute screen = 16000 bytes. 7000000/16000 = ~440 clock cycles per _byte_ output??? 8-/ Look: ld bc,#0850 m1 push bc ld a,(de) ld(hl),a ld b,0 add hl,bc inc d pop bc djnz m1 This crap prints one character and runs in 565 clock cycles. 565*80*25 = 1,130,000 clock cycles per screen output. 7000000/1130000 = 6.2 screens per second! If you open the cycle, then even more! In a second you can fill the entire screen with letters at least 6 times! You're glitching! Where and how did you manage the screen in two seconds? I saw color 512x240 on Pro and monochrome 640x200 on ATM. Everything is everywhere it worked quite well... Think for yourself. GMX is basically the same thing + a hardware scroller. WBR, Jason./*e-mail: jason2000(scary dog)yandex.ru ICQ: 62235830*/ /np:/ *silence*

Hello Nikolaj! 20 Dec 02 21:45, Nikolaj Amosov -> Kirill Frolov: NA> I checked - filling the entire screen for about two seconds in turbo NA> mode. Displayed directly, without any line transition signs NA> columns. scraddr dw 0x8000,0x8280,0x8500,0x8780,0x8A00,0x8C80,0x8F00,0x9180 dw 0x9400.0x9680.0x9900.0x9B80.0x9E00.0xA080.0xA300.0xA580 dw 0xA800.0xAA80.0xAD00.0xAF80.0xB200.0xB480.0xB700.0xB980 dw 0xBC00 ;BC=xy ld hl,scraddr ld a,c ;y add a,a ld d,0 ld e,a add hl,de ld e,(hl) inc hl ld d,(hl) ld h,0 ld l,b ;x add hl,de ;HL = address on the screen for the procedure for outputting a character from the previous letter. If you tweak it a little, then at the cost of two clock cycles you can do without modifying the pair de. add a,l ;hl=hl+a 20 bars ld l,a adc a,h subl ld h,a WBR, Jason. /*e-mail: jason2000(scary dog)yandex.ru ICQ: 62235830*/ /np:/ *silence*