Gluck cmos
ZXNet echo conference «hardware.zx»
From Konstantin Lebedev → To All 7 November 2001
▒┐ ▒┐
▒┐▒┌┘
▒┌┘ ┌┐│
▒│ └┘. All
└┘
In general, for Sergei Chikalev I wrote support for a watch based on a glitch for
drivers mmda... After 4-5 different versions of the driver I wrote
I am the following:
========================== rdtm .a =========================================
Piece!!!
;***********************************
SET_REG LD A,C: LD BC,#DFF7: OUT (c),a
ret
IN_C PUSH HL,bc,af
ld bc,#EFF7
in a,(c)
set 7,a ;enable access to glitch
out(c),a
pop af,bc
CALL SET_REG: LD BC,#BFF7
IN a,(c): POP HL:
push bc,af
ld bc,#EFF7
in a,(c)
res 7,a ;disable access
out(c),a
pop af,bc
RET
;--------------------------
;COUNT TIME
;[H]-[L]-[D]-[B]-[C]-[E]-[A]
;YY MM DD HH MM SS WED
D_RD_TIME LD C,#0B: CALL IN_C
RLCA: JR C,D_RD_TIME
ryear
LD C,#09: CALL IN_C: LD (year+1),a
dec a:cp 2:jp nc,ryear
rmonth
LD C,#08: CALL IN_C: ld (month+1),a
DEC A: CP 12: jp nc,rmonth
rday
LD C,#07: CALL IN_C: ld (day+1),a
dec a:CP 31: jp nc,rday
rhour
LD C,#04: CALL IN_C: LD (hour+1),a
CP 24: jp NC,rhour
rmin
LD C,#02: CALL IN_C: LD (min+1),A
CP 60:jp NC,rmin
rsek
LD C,#00: CALL IN_C: LD (sek+1),A
CP 60: jp NC,rsek
rweek
LD C,#06: CALL IN_C:ld (week+1),a
dec a:cp 7:jp nc,rweek
year ld h,0month ld l,0
day ld d,0
hour ld b,0
min ld c,0
sek ld e,0
week ld a,0
RET
===================================================================================
So everything reads realistically, but only the only thing is buggy: discharge
hours. Either it reads the clock normally, then it displays 0... Help please...
┌──>> Konstantin Lebedev/ElectroN/NightMare_Crew/SPb/Russia<<──┐
├>POST BBS...(812) 259-50-59...00:00-24:00...Vicomm compatible<┘
└──── ─ ─ ─ Wednesday, November 07, 2001 12:21:04...
From Kirill Frolov → To Konstantin Lebedev 9 November 2001
Press RESET immediately, Konstantin!
07 Nov 01 12:21, Konstantin Lebedev wrote to All:
D_RTC_INIT ; CALL WHEN DRIVER IS INITIALIZED
IF OTOPBu_XPEHb
LD BC,#EFF7
LD A, PRAY TO ALLAH SO THAT EVERYTHING DOESN’T FUCK UP
OR A,#80
OUT(C),A
LD BC,#DFF7 : AND #XX :
RET Z ; BINARY OR BCD FORMAT
LD HL,RRTC_BINARY
LD (HL),#C9
RET
RRTC
OUT(C),A
LD A,#BF : IN A,(#F7)
RRTC_BINARY
LD B,A : AND #F0
RRCA: RRCA: RRCA: RRCA
LD C,A : ADD A,A : ADD A,A
ADD A,C : ADD A,A : LD C,A
LD A,B : AND #0F : ADD A,C
LD BC,#DFF7
RET
D_RD_TIME
LD BC,#DFF7 : LD D,#0B
OUT (C), D : LD A,#BF : IN A,(#F7)
RLCA: JR C,$-7
LD A,#09 : CALL RRTC : LD H,A
LD A,#08 : CALL RRTC : LD L,A
LD A,#07 : CALL RRTC : LD D,A
XOR A : CALL RRTC : LD E,A
PUSH HL
LD A,#02 : CALL RRTC : LD L,A
LD A,#04 : CALL RRTC : LD H,A
LD A,#06 : CALL RRTC
EX (SP), HL
POP B.C.
RET
KL> So everything reads really, but only the only thing is buggy: discharge
KL> hours. Either it reads the clock normally, then it displays 0... Help please...
IRON AGAIN?
From Eugene Palenock → To Sergei Chikalev 15 November 2001
Привет, Sergei!
13 Hоя 01 01:42, Sergei Chikalev -> Aleksandr Majorov:
KF>>> Один pаз включи. ОДИH РАЗ. ВКЛЮЧИ. И никогда не выключай.
AM>> Пpичем желательно во вpемя инсталяции дpайвеpа,
AM>> а не пpи пеpвом чтении из часов.
SC> ... Помоги, не дай пропасть, please...
Дык показывай исходник своего драйвера, посмотрим.
Вот тебе мой драйвер с исходниками. Правда тут куча мусора
под ISDOS, но неважно. Если часы в BCD-режиме - то
раскоментируй кусок кода между метками READ и READ2. Если
у тебя KAY - то после метки CLOSE найди OUT (C),0 и замени
на XOR A, OUT (C),A.
=== Hачало CMOSGLUK.$Z ===
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From Nikolaj Amosov → To Sergei Chikalev 20 November 2001
Hello, Sergei!
Monday November 19, 2001 22:00:26 Aleksandr Majorov -> Sergei Chikalev:
AM>>> What a fool!
AM>>> I said it in Russian - RTFM!
AM>>> Read the documents - they rule! ;)
SC>> ... And where can I get them? Maybe you have it??
AM> Yes. Some kind of news. Tama the watch was described
AM> and all registers are bit-mapped.
And here is a clipping from that newspaper:
╔═───────────────════ ════───────────────═╗
│ CMOS clock │
╚═─────────────────── ───────────────────═╝
Alexander Mayorov
Dmitry Lomov
In this issue we decided to tell you about such a wonderful
things like the CMOS clock chip. What kind of animal is this and for
what does it need, you ask?
But look for yourself!
This chip provides computer-independent sub-
even time, generation of interrupt signals from the alarm clock, and so on
can also be used as a small non-volatile RAM on
50 bytes.
A special feature of CMOS watches is their extremely low energy
consumption! (according to the reference book, the current consumption is from 0.1 to 4 mA!).
If you connect a backup power source to this chip,information, then counting time and storing information in the internal
RAM will be guaranteed even when the computer is turned off.
You may ask - well, why do I need this?
Indeed, under normal conditions, a computer clock does not
very much needed.
But! If you write letters to Ehi from time to time, then the data
a watch will save you from having to constantly look at the calendar
Give and wall clock to put the time/date. Well, for BBS
or "miler" watches are very, very necessary!
Actually, the need for a watch was one of the reasons for the creation
giving a new version of the BBS. Which may be discussed next
current issues of Newski.
Well, now let's get down to business!
The microcircuit is called 512VI1, its proprietary prototype is MS 146818,
as well as the largest rulez - DALLAS 1287, which has internal quartz
and a battery for 10 years.
It should be said that such microcircuits are found in PCs 286 and 386, and
therefore available thanks to the great Upgrade...
To begin with, pin assignments:
01 NC not used
02 OSC1 generator input
03 OSC2 generator output
04 AD0\n
05 AD1\n
06 AD2\n
07 AD3 multiplex bus
08 AD4 address/data
09AD5/
10AD6/
11AD7/
12 GND ground
13 /CE crystal selection
14 AS address strobe
15 R/W read/write16 NC not used
17 /DS data strobe
18 /RES reset input
19 /IRQ interrupt request output
20 SED frequency control CKOUT
21 CKOUT clock output
22 PS supply voltage failure monitoring
23 SQW output of software-controlled frequency divider
24 +Ucc +3...+5 volts
And now in more detail:
Pin 02 (OSC1) must be supplied with a frequency from an external generator
speaker, or connect a quartz relay to pins 02/03 (OSC1/OSC2)
zonator
Pins 4...11 (AD0...AD7) - address/data bus, connected to
processor data bus.
Pin 13 (/CE) - crystal selection. If there is a log. "1" for given
The microcircuit is blocked at the current input.
There is one feature: at this input there must be a state
Log "0" during the entire cycle of accessing the chip. Those.
simultaneously with (or before) selecting the register address at the /CE input
log "0" should be set and its state should not change
during the entire cycle of accessing the selected register!
It is most convenient and simple to set the state at this input
log."0" for the entire time the computer is running.
The register number is selected by feeding it to the AD-bus
RES/DATA (AD0...AD7) and applying log "1" to input 14 (AS)
Pins are used to read/write data to/from register(s)
15 (R/W) - selection of read/write mode (log. "1" and"0") and 17 (DS) - data strobe.
When applying log "0" to the R/W output, data is written to
previously selected register, and when applying log "0" to the DS pin - read
Retrieving data from the register.
The appearance of log "0" on pin 19 (/IRQ) reports the system process
dark interrupt LSI. In all other cases, the data output
is in the third logical state (high impedance).
Supplying log "0" to the 22nd pin (/PS) informs the LSI that
There was a supply voltage failure and the contents of the registers were incomplete.
sure. If there is a backup power source, then this
input submit log. "1".
At pin 23 (SQW) there are frequency pulses that receive -
is determined by dividing the frequency of the clock generator by a coefficient specified
programmed.
At output 21 (CKOUT) there are pulses, the frequency of which depends
from the state of input 20 (SED). If there is log "1" frequency at
The SQW output coincides with the generator frequency (OSC1-OSC2). When on-
If log "0" is present at the SED input, the frequency at the SQW output is four times
less than the generator frequency (OSC1-OSC2).
The chip has 64 eight-bit registers. When working with
they must first indicate which register to work with (write
its number in the address register), and then write/read
tion.
Register numbers
#00 SECONDS
#01 SECONDS (ALARM)
#02 MINUTES#03 MINUTES (ALARM)
#04 CLOCK
#05 CLOCK (ALARM)
#06 DAY OF THE WEEK
#07 DAY OF THE MONTH
#08 MONTH
#09 YEAR
#0A REGISTER A
#0B REGISTER B
#0C REGISTER C
#0D REGISTER D
#0E General purpose RAM
...general purpose RAM
#3F General Purpose RAM
#0C,#0D - read only
#00,#0A - high-order bits read only
DESCRIPTION OF REGISTERS A...D
─════════════════════════─
REGISTER A (individual bits)
────────────────────────────
7 UIP "1" in this bit means that the information is being updated
tions and you can’t work with the clock, you need to wait a while.
Duration of update cycles depending on clock frequency
pulses:
┌─────────┬──────────────────────┐
│frequency │ duration │
│ MHz │ update cycle, ms│
├─────────┼──────────────────────┤
│4.194304 │ 248 │
│1.048576 │ 248 │
│0.032768 │ 1984 │
└─────────┴──────────────────────┘
32768 1048576 4194304 RESET
6 DV2 frequency 0 0 0 1
5 DV1 quartz 1 0 0 1
4DV0 0 1 0 x
3 RS3 Set the output frequency
2 RS2 SQW (23) and interrupt periods
1 RS1 IRQ (19)0RS0
IRQ - interrupt signal or DC. frequency, or
the end of the update cycle, or from the alarm clock.
IRQ = 1000/SQW
SQW is used to generate an alarm signal
For example: SQW frequency = 256 Hz, period is 1000/256 = 3.9ms
D3 D2 D1 D0 FREQUENCY, Hz PERIOD, ms
0 0 1 1 8192 0.122
0 1 0 0 4096 0.244
0 1 0 1 2048 0.488
....................................
1 1 1 0 4 250
1 1 1 1 2 500
REGISTER B (single bits)
───────────────────────────
7 SET "1" - update prohibition (to set the time).
6 PIE interrupt enable with a period specified in RS bits re-
hyster A. Reset by Reset.
5 AIE alarm clock interrupt resolution. Resets by Re-
set
4 UIE enable interrupt at the end of the update cycle. Sbra-
reset by Reset.
3 SQWE permission to output information to the SQW output. Resets by
Reset.
2 DM data type: 0 - binary decimal
1 - binary
1 24/12 count: 0 - 12 hours
1 - 24 hours
0 DSE "1" enables automatic changeover from summer to winter
time and back.
Daylight saving time switches over at 3am last night.
Sunday in April, and in the winter at 1 am on the last Sunday
October.REGISTER C (single bits)
────────────────────────────
All bits are reset by Reset or when register C is read.
7 IRQF interrupt request flag. Set to "1" under the condition
vii: (PF and PIE) or (AF and AIE) or (UF and UIE). If
IRQF="1", then the IRQ pin (19) is set to "0".
6 PF is set to 1 by the edge of the signal at the output of the internal
frequency divider selected in accordance with RS bits.
5 AF is set to 1 when the current time and the time coincide
alarm clock menu.
4 UF is set to 1 after the update cycle ends.
3 =0
0 =0
REGISTER D (single bits)
────────────────────────────
7 is set to log. "0" if the power was lost and the information
tion is unreliable. Set to "1" by Reset or when reading
Research Institute of Register D.
6 =0
0 =0
DATA FORMAT
───────────────
Sunday = 1, Monday = 2, etc.
January = 1, February = 2, etc.
1997 = 97, 1998 = 98, etc.
The number of days in a month is taken into account and leap years are taken into account.
If a number in the interval #C0...#FF is written into registers #00...#09 -
it is a state of indifference. Those. if alarm clock = #FF, then
it will fire every hour.
BEEPING A SOUND SIGNALWHEN THE ALARM GOES GOING
─────────────────────────────
It is necessary to set AIE=SQWE=1 UIE=PIE=0 in the {B} register.
The audio frequency at the SQW output is set by the RS bits of the {A} register.
When the alarm goes off, the IRQ output will be set to log.
"0". Those. to generate sound you need to OR the SQW outputs
and IRQ
You can install an RC chain, which after some time
after setting IRQ to #0, a reset signal will be generated, and the sound
will stop.
Nikolaj.
[REAL ZX]