(Functional diagram)

Hello Lethargeek It is no longer correct to talk about different “video modes”; in fact, these are operating modes second address counter and various ways to interpret the second byte read (*6 layers). In fact, the video card will now work in the same mode without any obvious switching according to the following general scheme (lowering the border and changing frames/lines): 1. Six pairs of bytes are read from all planes 2. INK and PAPER for the attribute are defined 3. For each pixel (first byte), its code (color) is determined 4. If it is 111111 or 000000, change them to INK and PAPER, respectively 5. For each pixel (second byte), its code (color) is determined 6. If it is not “transparent”, replace it with the code of the pixel obtained from the first bytes 7. From the GRBgrb format, the code is converted to the GRB000grb000 format for the DAC 8. These zeros are filled with the second byte code to produce 4096 colors The trick is that in the “attributed APA” at stage 5 the VC is always slipped "transparent" color, and at stage 8 - zeros instead of the code of the second byte. In the usual "two-plane" APA on stage 2 INK is always equal to 111111, and PAPER is 000000, at stage 8 - again always zeros. And finally, in 4096-color mode the same INK and PAPER are slipped in at stage 2, "transparent" color at stage 5, and at stage 8 the color is correctly expanded into the GRBGRBgrbgrb format In total, subjectively we have the following “modes” (not counting meaningless options):- standard mode - a special case of “attributed” APA-mode, cut off by a border - full "attributed" APA - 64 colors, separate FLASH, full screen (or its part) - also with vertical halves/horizontal halves/quarters - it’s also with hardware multicolor (the second counter runs to the same addresses in another page) - this same multicolor also has vertical halves (that is, the 1x4 “attribute”) - “two-layer” APA-mode - 64 colors, foreground and background - “dual” APA-mode - 4096 colors, pixels from different planes are “linked” Moreover, all these “modes” can be switched “on the fly” on one screen - that’s where spaces for demo-making. Of course, it would be nice to add the ability to generate INT on any line, and the handler, reading the number of the last output line from the port, will figure it out on its own, it's personnel interrupt or line. Then switching can be used to its fullest. In general, as I said - quantitative complication of the scheme with qualitative simplification. The main burden now falls on the bus interaction circuit, and not on video logic. That is, on each memory line you need to put the same circuits to execute logical operations for writing/reading, shifting, reflecting... but they are the same. A the rest should be simplified. And the Reset circuit too.