Dual processor.

Howdy, All! I decided to work on the subject. Really. You need a computer with memory running at 7 MHz, The processor is not gated. The main processor will operate either in turbo or in normal, additional - only at 3.5 MHz. I’m showing everything on temporary structures, because the scheme has not yet been settled. 1. ____________/-----------\n CPU VIDEO Typical temporary work on address multiplexers when memory operates at 3.5 MHz Turbocharge the memory: 2 ______/------______/------\n CPU1 VIDEO1 CPU2 VIDEO2 If the processor is working normally, then the byte read by CPU1 is equal to the byte by CPU2. In the turbo these are different bytes. And now attention is a question! :) Why does the video controller need to read the same byte TWICE??? So we give the second clock cycle, which previously belonged to another video controller processor (the clock cycle on it will be quite perverted, therefore, IMHO, it is necessary set the percentage designed for 7 MHz). We get a sabzhevy computer with parallel access to memory. The circuit will include two KP11, logic for “selecting” the clock, possibly IR23. The problem consists of the following questions: “Should the address space of the processors be divided?” And lyrics like “how to switch to subject mode?” This was originally intended to be DMA. Bye, Yuri. [I.ZX] [Chemists] [For full address] [Ski poles] /_500:322/33@ZXNet_/ /_dangercorp@bigfoot.com_/ /_dangercorp@mail.ru_/ /_2:462/93.33@FidoNet_/