Criticize the memory model (addressing 1 Gigabyte) — ZXNet «hardware.zx»

From Andrey Savichev To All 8 August 2006

Hello hero her> This is the same as the memory controller for the turbo2+ percent as before her> directly addresses no more than 64k. this is not entirely true if the CPU has additional commands in its command system commands to manipulate the contents of these 4 registers (numbers pages)...difficulties may arise with interrupts, stack, display video pages(?)

From Dmitry Demyanenko To All 8 August 2006

Hello andrews Returns from subroutines

From Dmitry Demyanenko To All 8 August 2006

Hello andrews This is the same as the memory controller for the turbo2+ percent is still direct addresses no more than 64k.

From Andrey Savichev To All 8 August 2006

Hello, All For vhdl-z80 CPU I'm trying to find a memory model that doesn't experience need for modernization in the near future :) Since since the time of "ZX Spectrum 48" 64K was divided into 4 pages of 16k, then the bad idea comes to mind to have four 16-r. "page number" indicator one for each of the 4 base pages and make them programmatically accessible. Then the shared memory of 1024 MB will consist of 64K 16K pages. What are the hidden ambushes here?

From Vlad Semchenko To All 8 August 2006

Hello andrews and> where will there be compatibility with basic models? A counter question - why then start a topic if everything is left as before? If you want a new memory model, then the ideal solution is linear addressable memory array, as implemented in the eZ80 (and Z380), i.e. with expansion of the PC register capacity and new commands.

From Chunin Roman To All 8 August 2006

Hello andrews and> this is not entirely true if the CPU appears in the command system and> additional commands for manipulating the contents of these 4 and> registers (page numbers)...difficulties may arise with and> interrupts, stack, display of video pages(?) But what for, it seems to me an unjustified complication, what difference does it make to use internal commands or writing to an external manager via the port, only in the first In this case, programmers will have to be retrained, but the second case is already familiar!

From Dmitry Demyanenko To All 8 August 2006

Hello spensor spe> the ideal solution is a linearly addressable memory array like this spe> implemented in eZ80 I support!!! the most beautiful solution that also allows you to make hardware protection for 64k tasks :) (if you solve the problem with commands like ld c,c)

From Andrey Savichev To All 8 August 2006

Hello icebear ice> Why not pick at the crust for linear expansion ice> memory? and where will there be compatibility with basic models? yes it seems if you don’t zoom in There’s really no need for video memory...is 16k pages really not enough for one page? text, video screen, array size in one dimension? those. have huge arrays and structures will become easy

From Andrey Savichev To All 8 August 2006

Hello, CHRV CHR> recording to an external manager via port it feels like it’s more flexible through commands... these are essentially new ways addressing, if well supported...why would I, for example, switch the code page if I just need a huge amount of data for a large game fields? or multidimensional strongly :)

From acidrain To All 8 August 2006

Hello, Black_Cat Bla> That is. is it meant to take the Z380 as a basis, and not copy it completely? Bla> It is possible, although with such radical plans one might even think about it uh, something carried you away. Are you going to make z380 on fpga? and answer the person's question - he asked about your knowledge of the processor building :) The memory model you suggested is used in doors/aqua OS. Learn mat part =)

From Valery Tkachuck To All 8 August 2006

Hello icebear ice> is the processor bit width calculated based on the data bus width? That is is it meant to take the Z380 as a basis, and not copy it completely? It is possible although with such radical plans one might think :)

From Valery Tkachuck To All 8 August 2006

Hello icebear ice> We are talking about the crust. Sorry, I skimmed the beginning of the post. Then an additional question - maybe 32 bit can the data be beautifully implemented at the same time? I mean, the core is 8/32 bit. In normal mode - Z80, in extended mode - 32bit with an extended address bus.

From Valery Tkachuck To All 8 August 2006

Hello icebear ice> Z380 Isn't the Z380 16 bit? Then 80486SX+Z80 :) is a joke. The stone has no legs will be enough, or for such a centipede you will need an adapter according to the appropriate class of printed circuit boards - type Slot-1(A). Although the enemies are on SIMM 72pin and implement 32 bit microcontrollers with the ability to manage external memory via SIMM bus.

From Valery Tkachuck To All 8 August 2006

Hello hero her> I support!!! the most beautiful solution If you also overcome internal ports, then perhaps this is the best option. Nobody Didn’t you see how they overcame the internal ports in the Sprinter? (if we are talking about ZX, and not about something completely incompatible).

From Valery Tkachuck To All 8 August 2006

Hello, Black_Cat Sorry for being off-topic, but in this regard, if we approach the matter generally pragmatically, then sell the stone directly under Socket-7 under ready-made PC motherboards, and Plug the ZX video processor into the ISA. All that remains is to write the BIOS and no need for bullshit suffer with a “blunt hot object.” :smile:

From Andreas Kaiser To All 8 August 2006

Hello andrews and> this is not entirely true if the CPU appears in the command system and> additional commands for manipulating the contents of these 4 and> registers (page numbers)...difficulties may arise with and> interrupts, stack, display of video pages(?) It will turn out to be Z180 :) There really aren’t new commands, but internal ports, but the idea is the same same. Why not pick at the crust to expand the linear memory?

From Andreas Kaiser To All 8 August 2006

Hello, Black_Cat Bla> Isn't the Z380 16-bit? Since when is the processor bit capacity calculated based on the data bus width?

From Andreas Kaiser To All 8 August 2006

Hello, Black_Cat Bla> Sorry, I looked at the beginning of the post. Then an additional question - maybe 32 Bla> data bitness can be beautifully implemented at the same time? I mean - s Bla> ability to work with 32-bit words in some extended mode. Maybe it’s better to immediately look towards the Z380?

From Andreas Kaiser To All 8 August 2006

Hello, Black_Cat Bla> If we also overcome internal ports, then perhaps this is the best Bla> option. Nobody watched how they overcame the internal ports in the Sprinter? What are the internal ports? We're talking about the crust.

From ASDT To All 8 August 2006

Hello andrews "For vhdl-z80 CPU I'm trying to find a memory model that doesn't experience the need for modernization" Why so many?

From Valery Tkachuck To All 9 August 2006

Hello andrews and> if multi-gigabit blanks appear, do not upload them to a larger one and> memory... If we extrapolate the NeDoPiSi concept (not to be confused with NedoPC) for building everything, then the bit depth needs to be increased now, otherwise you will end up with a tank with bottle neck - you need to fill it for a week. On a class 80486SX-50 process, DVD You will drain for 100-200 minutes. And this is with a 32-bit hole for the bucket.