512VI1

Hello, Eugene Palenock. · ·· --- /■▀■//[ Local time 12:46 ].∙---- -- -··· · ·· --- <·∙.■[ Eugene Palenock and All ].∙---- -- -··· · ·· --- ■▄■/[ Discussing 512VI1 ].∙---- -- -··· EP> Need a dock for the subject registers... Forgot the assignment of bits #A-#D... I don’t remember where I got it, but here it is: *** as if the beginning of the file 512VI1.DOC *** ╔═════════════════════════╗ ║ ║ ║ CLOCK IN YOUR COMPUTER ║ ║ ║ ╚═════════════════════════╝ We present to your attention a description microcircuit 512VI1, produced by Minsk association "INTEGRAL". It is intended for those who have some work experience those with Speccy or similar filling swarms It will also be useful to the program to the misters who decided to support this revision Speccy. In the next issue of ZX-ELEMENT there will be a diagram of connecting VI1 to ZX, driver and assignment of internal cells RAM in which the configuration will be written computer. This miniature device is designed to work in combination with ve microprocessor systems as part real-time owls with alarm clock, cali- for nothing and RAM with a capacity of 50 bytes. By connecting VI1 to your Speccy, you will be able to display display the time and date on the screen, making it easier to count time intervals, etc. 50 bytes of memory enough to save the current configurationguration of the machine (no need to poke determine the amount of RAM, the address of the extended port nya, etc.). 512VI1 is made in a DIP-24 package according to CMOS technology. Supply voltage from 3 up to 8V, current consumption no more than 50 µA. Connect +5V from Speccy and +3V from the battery ek through diode isolation - and everything is ok! Lo- logical levels are TTL, outputs hold currents loads up to 10mA. With quartz at 32768 Hz write or read cycle time not less than 1µs and increases to 5µs when powered from +3V. From a microprocessor (MP) point of view VI1 is 64 memory cells with addresses from 00H to 3FH, which are writable and reading. Exceptions - cells with addresses 0CH and 0DH, high-order bits of cells 00H and 0AH - they can only be read. MP writes to VI1 initial values of time and date, yes- gives a start command. After this, enough accurately count cell values to obtain current time and date. Due to lack any standard for Speccy ports you- share 64 addresses for one device without conflicts with previously created bells and whistles extremely difficult. (Example - on many machines atoit 580BB55A-printer port and KEMPSTON- joystick, addresses 1FH, 3FH, 5FH, 7FH. And in ZX-FORMAT-6 SOUND DRIVE scheme appears, landed at addresses 0FH-7FH. And if the author doesn't provided a request in the SETUP of my program addresses of new devices or disabling them, then problems with hardware are inevitable. But it's megot distracted). Therefore VI1 is connected via ports 00DFH-register address entry and 00BFH -writing/reading data, which is completely ana- logical to the PROFI computer. A small digression regarding the clock and PROFI. In one of the magazines there was information information that PROFI manufacturers have power the clock to the KEMPSTONE-MOUSE ports, due to Why doesn't a mouse breathe? Apparently the person who wrote this I'm not familiar with VI1. Mouse port - xxDFH, hours - 00DFH. The high bytes of the address are different with full addressing. In addition, the mouse is read-only, and port 00DFH is owls for recording only. So when arose in the event of glitches, take a soldering iron and make normal I/O port decoder. The table shows the VI1 memory card: ┌─────┬───────────────────┐ │Address│ Data │ Registers A-D ├─────┼───────────────────┤ │00H │Seconds. │ for a task │01H │Alarm seconds.│ operating mode │02H │Minutes. │ microcircuits. │03H │Alarm minutes. │ More details │04H │Clock. │ will be considered │05H │Alarm clock. │ ren below. │06H │Day of the week. │ Purpose of the device │07H │Number. │ tal regi- │08H │Month. │ the line is clear from │09H │Year. │ tables. ├─────┼───────────────────┤ │0AH │Register A. │ │0BH │Register B. │ │0CH │Register C. │ │0DH │Register D. │ ├─────┼───────────────────┤│0EH- │General RAM │ │ 3FH │appointments. │ └─────┴───────────────────┘ VI1 is connected to the MP system through two directional multiplexed bus data-addresses. When working with VI1 after two port it connects to the Z80 data bus. A coupling circuit works with the control lines. zheniya, forming the necessary signals when when the input port address decoder is triggered yes-conclusion. Below is a symbol and description of 512VI1 pin assignment: ┌───┬───┬───┐ Vss-supply voltage 22─┤PS │ │Vss├─24 nia. 18─┤RES│RTC│ │ GND-common. ├───┤ │ │ AD0-AD7-multiplex- 04─┤AD0│ │GND├─12 bidirectional 05─┤AD1│ │ │ new address/data bus 06─┤AD2│ │ │ new. 07─┤AD3│ │ │ OSC1-clock input 08─┤AD4│ │ │ generator (TG). 09─┤AD5│ │ │ OSC2-TG output. 10─┤AD6│ │ │ CKFS-setting coefficient 11─┤AD7│ │ │ division ratio for selecting ├───┤ │ │ CKOUT stroke. 14─┤AS │ │ │ CKOUT signal TG for 17─┤DS │ ├───┤ use in others 15─┤R/W│ │IRQ├─19 devices. He post- 13─┤CE │ ├───┤ solders directly ├───┤ │SQW├─23 (CKFS=1) or through de- 20─┤CKFS CKOUT├─21 casts per 4 (CKFS=0). ├───┤ ├───┤ SQW signal TG, supplying 02─┤OSC1 OSC2├─03 via a divider. └───┴───┴───┘ Signal resolution and The division coefficient is set by the MP during the program. framing registers A-D.IRQ request for MP interruption when an events that require software boots. This is the end of the update cycle formations in registers 00H-09H (occurs every second), the alarm goes off. It is possible to generate requests with a frequency signal at the SQW output. Exit completed by open drain circuit. Due to lack in Speccy interrupt controller this output together with SQW can be used for sound signal when triggered alarm clock RESET-reset. Resets to original state nodes VI1, responsible for communication with the MP when a logical "0" is applied. No interference MP's involvement in the work of VI1 at this time is not perhaps. For clock, calendar and RAM cells no effect. Pulse duration is logical "0" at least 5 µs when turning on the pi- tania. PS power sensor input. It is connected in such a way that the voltage across it is dropped to zero even with short-term use power failure. After the resumption of supply power supply logical "0" on this pin must last at least 5 µs. When this is the most significant bit of register D automatically is set to "0". The unit can be set update only by reading this register ra. This fact allows us to determine the accuracy of information in cells VI1. CE - chip selection. When applying logical "1" AD bus, DS and R/W inputs are disconnected from MP, power consumption is reduced. Low-which level is set during the action impulse AS and remains unchanged until the windows read/write cycle. Allowed permanent connection of the output to the common wire. AS address strobe. Served as a posi- solid pulse if there is an address on AD bus. Based on the pulse cutoff, the address is recorded - is transferred to the internal buffer VI1. At the same time the level at the DS-strobe input is analyzed data, which determines further logic work VI1. If this level is "0", then during a positive pulse DS data will be written/read according to with the level at the R/W input - reading when "1", and the entry is at "0". If this level is "1" - for reading a negative pulse DS is supplied (to the input de R/W "1"), and for writing negative a pulse is sent to the R/W input (to DS "1"). This sophisticated logic allows connect VI1 to various MPs. Now is the time to talk about the program framing the microcircuit, that is, about the work with registers A-D. The symbols are shown below. the significant bits of registers and their descriptions sanitization. The symbol "*" denotes the digits that These can only be read. Register A: UIP* (bit D7) Log. "1" means that runs or will occur in 244µs cycle updating time information. Sig- The RESET cash has no effect on it. Record- save log "1" to the SET bit of register B, you can disable updating and therebyWe reset the UIP to "0". DU0-DU2 (bits D4-D6) The code is written here 010, corresponding to quartz per frequency 32768Hz. RS0-RS3 (bits D0-D3) Code 0000 prohibits appearance of a signal at the SQW output. Other Some codes will give a signal with a frequency of 2 up to 8192Hz. What frequency is what code responsible? Below is a list of frequencies for codes from 0001 to 1111 (in hertz): 256, 128, 8192, 4096, 2048, 1024, 512, 256, 128, 64, 32, 16, 8, 4, 2. Register B: SET (bit D7) Log. "1" in this bit is written decides to update time information nor, giving the opportunity to write down the necessary data into registers 00H-09H. Log. "0" allows VI1 to start timing. PIE (bit D6) Enables periodic interrupts house specified by the RS0-RS3 bits of the regi- page A. Can be reset by signal RESET. AIE (bit D5) Enables wake-up interrupts flax Can be reset by signal RESET. UIE (bit D4) Enable window interrupt at the beginning of the update cycle. Maybe reset by the RESET signal. SQWE (bit D3) Enables signal output to SQW output. The signal may be reset scrap RESET. DM (bit D2) "1" means that data about yes- those and times are represented in binary form, "0" - in binary decimal. Change Deleting this register without overwriting data in registers 00H-09H is not possible. 24/12 (bit D1) "1" sets 24 hoursowl mode, "0" - 12-hour counting mode that time. In 12 hour mode the time afternoon (PM) is marked by one in the most significant digit of the clock register 04H. DSE (bit D0) "1" enables automatic transfer to summer time. Last Sunday April after 01:59:59 automatically is set to 03:00:00, and then her Sunday in October after 01:59:59 is set to 01:00:00. By entry "0" you prohibit auto translation. Register C. IRQF* (bit D7) Interrupt request flag. Set when the condition is met PF*PIE+AF*AIE+UF*UIE=1 Simultaneously on pin IRQ is set low level. The flag is reset when read register C or a RESET signal. PF* (bit D6) Set to "1" according to ntu signal on the internal divider, selected according to ranks RS0-RS3 of register A. The flag is reset by reading register C or by RESET signal. In my opinion, this flag can be used for counting time intervals of long lasting less than 1 second. AF* (bit D5) The flag is set when falling of the current time with time, specified in the alarm clock registers. Flag reset by reading register C or RESET signal. UF* (bit D4) The flag is set to "1" after the end of each update cycle, nia. The flag is reset by reading the registerpa C or the RESET signal. Register D: VRT* (bit D7) The flag is set to "0" when the PS input is low. "1" us- can only be adjusted by reading the re- hyster D. Well, we're done with the theory. Now I give instructions for working with VI1. ATTENTION! When working with VI1, use only full port addressing, which reduces increased risk of conflicts with all the hardware that is already in your car. Access to registers VI1 is two-stage chat: first write the address to port 00DFH the desired register, then through port 00BFH writing or reading data. It is possible that on turbocharged Speccy will have to be introduced before additional NOP commands after writing ad- register res so that VI1 has an agreed-upon 1µs in the description for preparation for application to him/issuing data. In the absence of a turbo pro- I couldn’t believe it, although the experience of fiddling with by our mikrukhs says that in their descriptions usually indicate not the best parameters and extra NOPs will not be needed all VI1. But, considering that computers have turbochargers now up to 14MHz, in my driver I have this I'll take it into account. After turning on the power, register A is charged the code corresponding to the application is written to the desired quartz and the required frequency at the output de SQW (or frequency of periodic interruptions) niy). For quartz at 32768Hz and SQW frequency 512Hz is code 00100111 (27H). Then in re- register B, the code is entered with "1" in the highest order -row to prevent the clock from running. The rest the digits determine the time counting mode and generation of interrupt requests. For example, code 10000010 (82H) sets 24-hour owl counting mode without automatic translation to summer time with binary decimal pres- data transfer; all interrupts are disabled and outputting a signal to the SQW output. After this, in the cells of the clock, calendar and alarm clock, the data from which The countdown begins. Values must be entered in the format specified in the relevant digits of register B. For example: decimal the number 11 corresponds to 00001011 (0BH) in binary code or 00010001 (11H) in binary but-decimal. In 12 hour time mode afternoon corresponds to "1" in senior digit of the clock register. For example, the code 00000111 (07H) corresponds to time seven o'clock in the morning, and the code 10000111 (87H) is seven o'clock in the evening. Days of the week are coded as follows: 1-Sunday- Nye, 2-Monday, etc. If disabled automatic changeover for daylight saving time, then use There is an encoding in which 1 is Monday flax, and 7 is Sunday. Months are coded as usual: January 1, February 2, etc. Year specified by the last two digits - 1998 written as 98 (62H). Having set the initial values, we allow clock progress. To do this, the code in register B is change the same, but with zero in the highest order - row. If necessary, you can allowall or part of the interrupts and signal output to the SQW output. The first data update will be det 0.5s after writing "0" to bit D7 register "B" and then every second. Z80 equal to 3.5 MHz. If necessary, analyze lyse several C register flags, then remember its meaning - all the flags after register reads will be reset. Reading flag ga from register D will help you determine Has the supply voltage been lost and, if so, then you will have to program VI1 again. Well, I wrote everything I could. Outside the window night and really want to sleep. If you dis- they fought with all the nonsense that I wrote here - sal-excellent. And if not, write, ask questions. I'll help as much as I can. Based on materials from "Radio Yearbook-1989" typed the text in the "WINWORD" editor Alexander SAM. ───────────────────── ───────────────────── *** as if the end of the file 512VI1.DOC **** Sincerely, Max Melnikov... aka HighLander... aka Uncle Maximka... .·∙.■▀■▄■...[ProDiGy]...[GirlS]...[MetaLlicA]...■▀■▄■.∙·. `∙..∙·---──·─//─..[UnrEAl TouRNameNt]..─/─·──---·∙..∙','180