Speccy Timings.

Hello, hello Alexander! One day, in the chilly summer, something around (10-11-98/00:59:05) Alexander Ageev once wrote to Vitaly Vidmirov... VV>> What does “about the work of ULA” mean? Temporary buildings, or differences from, say, VV>> Pentagon? AA> Both temporary buildings and differences from the Pentagon, I’m interested in ABSOLUTELY EVERYTHING about ULA. AA> Do you have information on delays generated by ULO when accessing AA> to the FE port and shared memory ? AA> Suggested answer: no ;) because no one knows Quite passable information on ULA (naturally, from a software point of view Spectrum emulation) is available in the description for the Lunter emulator. I already posted excerpts from it here, but as it turned out, no one saw it ;) Also, some information was gleaned through “questioning” and "extorted" from the Czechs (K3L). In general, Spectrums come in 48, 128, +2 (= +2 + tape recorder), +2a (Amstrad's +2), +3 (same thing but with a discoglot). I won’t go on and on about the fact that ULA works on its own bus and with its own piece of memory. This is already common knowledge. Temporary buildings, memory. Temporaries differ only for 48k and 128k cars. Cars +2a/+3 similar to the 128th (and +2), although not in everything, because have been reworked. 48k: |<- 224 ->| +---------+--+--+--+-------|/////////|rb|lb|hb| ^^ |<- 128- >|24|24|48| |192| |/////////|<>|<>|<>| | | +---------+--+--+--|--- | 312 | ^56 | | | | | #---------+--+--+--| | | ^64 | | | | | (~16 behind the scenes) +---------+--+--+--+------- # - appearance of int (224 x 64 = 14336) total 224 x 312 = 69888 for 128k: |<- 228 ->| +---------+--+--+--+------- |/////////|rb|lb|hb| ^^ |<- 128 ->|??|??|??| |192| |/////////|<>|<>|<>| | | +---------+--+--+--|--- | 311 | ^56 | | | | | #---------+--+--+--| | | ^63 | | | | | lb+rb+hb = 100 clock cycles, probably distributed as 25/25/50. total 228 x 311 = 70908 Naturally, such a percentage will only work at such a speed when it works with fast memory. When working with shared (slow) memory slows down the processor until the ULA will do his dirty deed. As you know, for the 48th slow memory occupies addresses #4000-#7FFF. For 128 cars the brake banks are: for 128/+2: 1-3-5-7 for +2a/+3: 4-5-6-7 The degree of inhibition when accessing slow memory is different for different cars: 48 -> 128(+2) -> +2a(+3) in increasing order productivity. On average, accessing slow memory takes 15-20% more. If the program is there, then the braking can reach 25-30%. For example, ld a,(#4000) will last ~15 cycles (according to information from Dron/K3L ;). Ports.in a,(#fe) does not happen immediately, and takes ~12.25 clock cycles versus 11. To be honest, I don’t remember about out (#fe), but it doesn’t seem to slow me down. Yes, the color of the border changes when a byte of video data is sucked in, i.e. every 4 beats. Banks are able to click on: 128/+2: out(#fd),#1x, exactly like out(#0d),#1x +2a/+3: out(#fd),#5x. ULA glitch I will separately dwell on the reason why you should not put into register I numbers, such that the vector is in slow memory. As you know, during the execution of loop m1 (code extraction operations) z80 performs memory regeneration, issuing to low part of the address is register R, and in the upper part I. ULA, seeing that the address lies right in slow memory, thinks that the percent wants to read the byte by to this address... and in the end, unable to cope with such frequency read misses every second byte. Instead it is repeated previous. This glitch for 48 and 128/+2 is not dangerous - just visual effects. While at +2a/+3, programs immediately collapse. I can't remember anything else :( evil Vitalik AKA Dark/X-Trade