SMUC CMOS

Press RESET immediately, Igor! Replying to a message of Igor Kiselev to All: IK> MSGID: 500:812/04.04 275dab99 *MAAAAAAAS*!!! You screwed up the MSGIDs! IK> Good people, please teach me how to use the subject through IK> I/O ports: READ/WRITE.:) The SMUC controller has 2 registers accessible via I/O ports: READ WRITE PORT ADDRESS DFBA cell data cell address CMOS FFBA undefined mode *) *) byte defines the operating mode of the SMUC controller and including set bit 7 (counting from zero) responsible for writing to CMOS. If bit 7 is cleared, then by writing to the DFBA port the cell address is written CMOS and then from the DFBA port you can read cell contents. If bit 7 in the FFBA port is set, then when writing to the DFBA port, a write is made to the cell CMOS with the address specified above. **) After the CMOS cell address is written to the RTC chips it is stored there only until the first read-write operation cells. To read or write to a cell again, you need set the address again. If the address is not set, then reador no recording will be made. IK> It is advisable to consider the problem using an example! Read cell A, exit to reg. A: rd_cmos: ld bc, 0xdfba ld de, 0x2a53 call call_dos ld de, 0x3ff3 jr call_dos Writing cell A with contents in reg. D: wr_cmos: push de ld hl, smuc_mask ld bc, 0xdfba ld de, 0x2a53 call call_dos push bc ld bc, 0xffba ld a, (hl) or 0x80 call call_dos pop bc pop af call call_dos ld bc, 0xffba ld a, (hl) and 0x80 call_dos: push de jp 0x3d2f ***) These examples may not be fully functional! ****) When working with the real time clock, you need to adhere to certain rules to be sure that the given time is correct. Here there are 2 option: check the update bit in the clock status register or read time 2 times (only seconds are enough if you are sure that the procedure reading executed faster than one second) and compare - if the time is different you can start reading all over again. IK> ! Origin: MAS DIE :) (500:812/04.04) Ha-ha