Screws (previously: To catch up with bootloaders)

Hello, Kirill! 17 Dec 98 at 04:37:12, Kirill Frolov => Valerij Kozhevnikoff: VK>> Nema has kachmar. Registration is done via: VK>> ld a,(hl) VK>> out (#f0),a VK>> inc hl VK>> ld a,(hl) VK>> out (#f1),a VK>> inc hl VK>> There are no longer 20 bars. Sorry, I got the addresses wrong. Ports should be #11 and #10. And the bytes are in the wrong order. In general, I figured it out better, here’s a piece from live ide+3.blk. ===================== import file nemohdd .t ================== ;first spitting LLA5C2 INC HL LD A,(HL) OUT(#11),A DEC HL LD A,(HL) OUT(#10),A INC HL INC HL IN A,(#F0) ; condition BIT 3,A ; DRQ check JR NZ,LLA5C2 ; if so, let's continue RET ;second spitter LLA5D3 LD B,#80 LLA5D5 INC HL LD A,(HL) OUT(#11),A DEC HL LD A,(HL) OUT(#10),A INC HL INC HL DJNZ LLA5D5 RET ============================ import end =======================There are NO other spitters in the driver!!! Moreover, the first one is called constantly, and the second one is called only for reading halves sectors!!!!!!!!!!! KF> vilest LAMARY!!! Absolutely true!!! It’s a good idea to wait for DRQ after _every_ _word_!!! Just don’t ask me “maybe this is how it should be?”, the protocol is clear in the document everything has been said and verified many times. KF> pop hl ; 10 KF> ld a,l ; 4 KF> out (port0),a ; 11 KF> ld a,h ; 4 KF> out (port1),a ; 11 KF> ^^^^^^^^^^^^^^^^^^^^ it will be faster... My numbers are a total of 20 clock cycles per byte (when recording!). Only I made a little mistake and confused you: the _most significant_ byte is spit out first (and latched in the register) and only when writing the low byte (when on the IDE bus a whole word sticks out) the screw is given IOWR. Thanks for the idea, I'll definitely use it. One thing worries me - even though all this is done after DI, what if NMI comes? I'm confused right now like this: inc hl; 7 ld b,d ; 4 outd ; 16 ld b,e ; 4 outi ; 16 inc hl; 7 That works out to 27 clock cycles per byte.KF> The recording is similar, only you need to rearrange h and l ^^^ higher and it will be ^^^^^^ did you mean reading? Mistakes, however. And just when reading, there is no need to rearrange bytes. When reading from #10, the screw is given IORD, the low byte is given to the processor, and the senior one is latched in the register and read from #11. KF> 20 clock cycles per byte r/w. KF> ld c,d KF> ini KF> ld c,e KF> ini KF>>> Zonov too - BUT HE DID NOT HAVE TO SAVE ANYTHING! VK>> This is not the only reason for Zonov. In the alter, only the decoder sits on relish, VK>> registers are all external, ordinary IR23. KF> ~~~~~~~~~~~~~~~~~ KF> Registration is a pity :-( Apparently it's a pity. WBR, Jason.