IBM ports on SMUC

Hello, All! Subject Explain to a Russian person how to calculate hexadecimal analogues port 3f0h-3ffh from this abracadabra. Answers like “everything is already explained there” are not accepted :) === Cut === The controller decoding circuit allows you to select any input/output port on IBM PC XT peripheral board connected to SMUC. I/O ports of IBM devices are decrypted using 10 address lines (a9...a0). At the same time, according to the IBM specification, the a9 line for “external” IBM devices PC XT must be in log. 1, which is provided in hardware in SMUC. There are 9 lines left, but place them all in the ZX Spectrum address space difficult - it is necessary to ensure decryption of other controller devices. Therefore, the two highest lines (a8 and a7) are multiplexed - their state is in I/O operations are static. The value of these addresses should be pre-recorded in a special control register of the controller. Address this register in the TR-DOS ZX Spectrum space - 0ffbah. Since the rest The bits of the control register are used for the internal needs of the controller, it is necessary to ensure their correct installation. Setting bits a8 and a7: D7 D6 D5 D4 D3 D2 D1 D0 0 1 1 1 0 A8 A7 1 Other settings for digits D7, D6, D5, D4, D3 and D0, in addition to the one shown above, is unacceptable and can lead to controller inoperability. The remaining sevenaddress lines are transmitted directly to the IBM slot. To select an IBM device it is necessary to provide the full sixteen-digit address of the ZX I/O port Spectrum, in which you should set the lines for selecting the slot itself and the address in German The address should be accessed in the TR-DOS address field. Selecting an IBM slot: Scorpion A15 A14 A13 A12 A11 A10 A09 A08 A07 A06 A05 A04 A03 A02 A01 A00 IBM 0 a4 a3 1 1 a2 a1 a0 1 1 1 a6 a5 1 1 0 The symbols aN indicate address lines of input/output ports on IBM PC cards XT. An example of accessing the COM1 serial interface card connected to controller SMUC. The base address of the COM1 device, specified for IBM-compatible cards - 0x3f8h. First, the contents of the register are determined control (address lines a8 and a7). For address 0x3f8h this is: a8=1, a7=1, Therefore, 77h must be written to the control register: D7 D6 D5 D4 D3 D2 D1 D0 0 1 1 1 0 1 1 1 Next, the address of the external device in the TR-DOS area is calculated, substituting in table of the corresponding address lines, it turns out 78feh: Scorpion A15 A14 A13 A12 A11 A10 A09 A08 A07 A06 A05 A04 A03 A02 A01 A00 IBM 0 1 1 1 1 0 0 0 1 1 1 1 1 1 1 0 === Cut === * Also sent to HARDWARE.ZX * Also sent to CODE.ZX Vega/ex-Style Group. FIDO: 2:5030/1006.19 ZXNET: 500:812/19 E-mail: vega56@mail.ru

Press RESET immediately, Vlad! 08 Jan 03 02:14, Vlad Sotnikov wrote to All: VS> Subject. Explain to a Russian person how to calculate VS> hexadecimal analogues of port 3f0h-3ffh from this abracadabra. No big deal. It is incorrect to specify a port with just one address. Below is my memo from HARDWARE.ZX, according to it the addresses are: MS-DOS name | ISA basic | ZX-Spectrum basic | Conf. reg. devices | port address | port address (in TR-DOS)| cp.1 | cp.2 COM1 | 3f8 | 0x78fe | 1 | 1 COM2 | 2f8 | 0x78fe | 1 | 1 COM3 | 3e8 | 0x38fe | 1 | 1 COM4 | 2e8 | 0x38fe | 1 | 1 COM4 * | 2e0 | 0x18fe | 1 | 1 COM4 * | 238 | 0x78ee | 0 | 1 (table 1.) note: ports marked with an asterisk ('*') are rarely used on IBM-PC, Typically the main port address is 0x2e8. Register port address (0..7) of the asynchronous serial controller interface (UART) type 16550A (or compatible) when accessed via SMUC calculated using the following formula: IOaddr = IObase + (Rno*256) IObase -- base address of the ZX-Spectrum port, Rno -- register number (0..7)interface controller, IOaddr -- the address of the ZX-Spectrum port at which you can access the register of the serial interface controller. Some of the bits of the ISA address bus (the two right columns of the table) are set bits 1 and 2 in the SMUC configuration register, accessible through the Spectrum port with address 0xffba (in the address space of the Beta-Disk interface ports). Usually in The configuration register is written to 0x77. Configuration register bits: number| | record by bat | description | default 0 | isa/pic/ide reset (0 active) wo | 1 1 | A7 ISA wo (designated as cp.1 in Table 1) | 1 2 | A8 ISA wo (designated as cp.2 in Table 1) | 1 3 | enable interrupts from pic (1 active) wo | 0 4 | SDA out wo | 1 5 | write protect NVRAM (1 active) wo | 1 6 | write SCL, read SDA rw | 1 7 | 0=(rtc read, ide command register block), | 0 | 1=(rtc write, ide status register block) wo | ATTENTION! ALL INFORMATION ON THE SMUC CONTROLLER IS GIVEN IN THIS LETTER IT IS UNVERIFIED AND POSSIBLY ERROROUS! All port addresses have been calculated based on the assumption that address bit A9 of the ISA bus in SMUCcontroller can be controlled by a communication program. If this not so, then it is possible to use only ports COM1 and COM3 or only ports COM2 and COM4. Since it is not known how the address signal A9 of the ISA bus, most likely the option occurs when it is possible using only COM1 and COM3 ports. In addition, there may be differences in different SMUC controllers, it is known for sure that SMUC controllers are some old ones versions contained a bug that made it impossible to use one of the possible port addresses, most likely COM3. If you have accurate information about this, please let me know. = Iron Spectrum (500:812/1.507) ============================= HARDWARE.ZX = Msg : 1291 of 1297 Snt Loc Scn From : Kirill Frolov 500:812/1.507 17 Jul 02 21 To : All 17 Jul 02 21 Subj: SMUC unknown ports =================================================================================== Press RESET immediately, All! Below is the breakdown of SMUC ports. Questions indicate ports unknown purpose. Signal A9 is not output to the ISA bus, which also seems strange. It would be nice if anyone with a real piece of hardware clarified the conditions for selecting the controller (IMHO I'm thereadded extra signals) and the purpose of unidentified registers. There are questions: when accessing which ports, reading and writing occurs in IDE drive registers -- when accessing the shadow register containing upper 8 bits of the data bus drive, or when accessing the low-order part of the data register? What serial EEPROM chip (connected via I2C, small such, 8-pins) installed in the SMUC controller? 256 bytes or more? There is an assumption that the same thing is written inside that is written in sector 15 tr-dos disk. That is, autoloading can be done not only from the disk, but directly from eeprom. Where is the alarm output (interrupt, that is) of the RTC chip (512VI1) connected? aka "CMOS")? On IRQ0 of the interrupt controller? Where are IRQ1,2,3 connected? ? Are interrupts (IRQ2-IRQ7) sent somewhere from the ISA slot? Must go on PIC (type 580BH59 interrupt controller). CONTROLLER SELECTION CONDITIONS: { a0=0 } AND { a1,a5,a7,a11,a12=1 } AND {trdos active} | | ! ISA-BUS ADDRESSES: | ! a8,a9,a10,a13,a14,a3,a4 isa/ide/pic address (A0-A6) | | +- a6=1 access to ISA slot | | (!) INFLUENCE OF A13 ON THESE PORTS IS UNKNOWN! | | | +- a2=1 | | | | | | | | +- a15=1 ??? (ISA A9 ?) UNKNOWN REGISTER | | | | | | | +- a13=1 ??? | | | | | | | +- a13=0 ??? | | || | | | | +- a15=0 isa bus ports rw | | | isa address bits(A9-A0): (cp==control port bit) | | | { ? (1), cp.2, cp.1, a4, a3, a14, a13, a10, a9, a8 } | | | | | +- a13=1 ??? (presumably don't care) | | | | | +- a13=0 ??? (presumably don't care) | | | | | +- a2=0 ??? | | | +- a15=1 ??? UNKNOWN REGISTERS | | | | | +- a13=1 ??? | | | | | +- a13=1 ??? | | | +- a15=0 ??? | | | +- a13=1 ??? | | | +- a13=0 ??? | | +- a6=0 access to SMUC devices | | +- a2=1 access to IDE and PIC controllers | | | | | +- a15=1 ide controller ports | | | | | +- a13=1 ide interface registers rw | | | | | +- a13=0 shadow ide register rw ? | | | | | +- a15=0 interrupt controller register block rw | | | +- a13=1 | | (what is the impact of this bit) | | (for operation of SMUC and controller) | +- a13=0 (interrupts? unknown) | | +- a2=0 | | +- a15=1 rtc/control port | | | +- a13=1 control port| | + bit0 isa/pic/ide reset (0 active) wo | | + bit1 A7 ISA wo | | + bit2 A8 ISA wo | | + bit3 enable interrupts from pic (1 active) wo | | + bit4 SDA out wo | | + bit5 write protect NVRAM (1 active) wo | | + bit6 write SCL, read SDA rw | | + bit7 0=(rtc read, ide command register block), | | 1=(rtc write, going status register block) wo | | | +- a13=0 rtc port | control port bit7=0 write address, read data | control port bit7=1 write data | | +- a15=0 fdd status port rw + bit7 1=drive A: real disk, 0=emulated + bit6 1=drive B: real disk, 0=emulated ro = read only rw = read and write ps: I have a port table from Jason... -+- [ZX] + Origin: on PC we put a cross, speccy generation next! (500:812/1,507)