GLUE-FREE GLITCH SCHEME

Greetings, All! This is, IMHO, the most glitch-free scheme for connecting a watch to a glitch. Or rather, there is one signal decoder to which DALLAS is connected, port #eff7 - video modes and #cff7 - configuration. ___ __ Signals AS, R/W and DS are Dallas legs 14,15 and 17. A3>───────┐ │┌─┐ ___ ┌─┐ └┤1│ ┌─┐ DOS>──┤1o───┤ o───┤1o──┐ ┌┤ │ └─┘ ┌┤ │ │ │└─┘ │└─┘ │ __ ─┴─ ─┴─ │ ┌─┐ WR>───────────────────│───┬─┤1o──>AS ┌───────────────┘ ┌─│─┤ │ │ ID7 │ │ └─┘ │ ┌──┬────┐ │ │ ┌─┐ ___ ______ └─oE1│DC 6o───────┘ ├─┤1├──>R/W IORQCE>──oE0│ │ ┌──│─┤ │ A15>─────┤E2│ 5o──────┤ │ └─┘ │ │ │ │ │ ┌─┐ ______ ├──┤ 3o──┐ │ ├─┤1├──>wrEFF7 A14>─────┤X0│ │ └───│──│─┤ │ A13>─────┤X1│ 1o─┐ │ │ └─┘ A12>─────┤X2│ │ │ │ │ ┌─┐ ______ │ │ │ │ │ └─┤1├──>wrCFF7 └──┴────┘ └────│────┤ │ │ └─┘ │ ┌─┐ __ __ └────┤1├──>DS RD>─────────────────────────┤ │ └─┘- - - - - - - - - - - - - - - | --- GLUKS FREE --- | | REKOMENDOWANO K PRIMENENIU | - - - - - - - - - - - - - - - __ __ Glitch-free operation is achieved by using RD and WR signals at the final stage decryption, which makes the circuit not critical to delays in preliminary decryption stages (within reasonable limits). Used radioelements: 555LL1, 1533LE1, 1533ID7, PENTIUM (any, you can broken). All small logic should be soldered according to the diagram, and drilled into the Pentium hole (or hole) and use it as a keychain. P.S. I forgot to add - the clock is not prohibited by bit 7 #eff7. Because it is Sax and Masdai. With best wishes, Kirill Frolov.