ALTERNATIVE MEMORY CONTROLLER
(C) Sergei Krinitsyn
(PC users, "byte" is dedicated)
Being a PC user "byte" I
used to the fact that some prog running on it the brakes. In
the past, 90% these demos were progressive, it is now
while this glitch is found everywhere:
BEST VIEW of up to BORN DEAD.
As a way out typically used turbirovanie. For example one of
variants of the acceleration was published in
POLESIE newspaper. The scheme consisted of two
parts: a 1-in fact, overclocking is not,
but simply resolves an issue of developers
"Byte". (This error is to stop the CPU when you try to
regenerate them slow memory. This refinement is very effective
in the loader, but it does not prevent inhibitions associated
with rasspolozheniem interrupt handlers in the slow memory that
occurs quite often.)
The second scheme was turbirovanie as
as such, but ... I was immediately alerted that
Signal INT once chops turbirovanie.
How can this be, since INT asynchronous signals
M1, and switching the clock frequency of
instruction execution time lead to crash
CPU. But as the author claimed that the scheme
working, I decided to try it. For bullying was rip it out of my
friend PC (Why do I say when) in any way and was tried for the
scheme (on a computer course:)). As expected, the PC just
hangs. After synchronizing the switching clock signal M1
everything seems to work. And then run the TEST 4.22. Well
beats added, but the inscription on the inhibitory memory will
not gone, just reported, saying that the turbo
included. Run the other program - something that
gone, but not all. By the way digitizing
sound rather foolish. Well, it turns out
interesting detail - some prog on Turbo reset, not once, but
after 15-30 minutes of work. These prog such concerns ZASM
3.10, where stuffed this article. Why is the LRA, it remains a
mystery to me, but the conclusion was odnoznaznachen: a turbo I
nafig needed. Complex was found in the original form and
returned to the owner.
By the way complex was chosen because there
stood Z80B, if you have a comp worth Z80,
Z80A, or their analogues (often
INTEGRALOVSKY, as well as analogues produced in the former East
Germany) do not even try make dispersal to 7MHz - nothing
happens. Replacement procedure for Z80B or Z80H fun little,
since after such abuse motherboard can come ... Well guess what
dogadali themselves. As the output of the situation, the
proposed scheme entogo the controller of alternative memory.
You can put it on any computer with separate fields of memory,
with the pick motherboard almost not necessary. Naturally
method requires more shells than turbirovanie, but in my
opinion it is worth it.
And so you'll need:
K1533LI1-1pc.
K1533LL1-2pcs.
K1533LA3-1pc.
K555KP12-1pc.
KR565RU5-8pcs.
Mikruhi As you can see very extended ones, just do not
replace the advice of their counterparts 155 and other brake
series, as well modify the proposed chart below - it can cause
the brakes. This is manifested in appear during programs on the
screen, dashes and attributes. If everything is assembled
correctly, should work immediately and without any glitches.
Now a little about the work of the scheme. Principle
action is based on the substitution of slow memory further
(alternative), the ruler of fast memory when accessing Ares #
5B00-7FFF, and the additional Banks slow memory.
In this case, each bank of memory is slow piece replaceable
memory size of the screen. This is done on purpose, so since I
have is allowing pribambas view all of them, ie, 4 screen,
rather than two (for the implementation of hardware tricolor).
Well I guess I'll just download, and
you understand all this nonsense. Therefore, round out and
bring the scheme devaysa.
CS> x
A15 '>' o 'o' o a> CS1
A14 '>
A11> '' January 1> CS2
A12>
A10>
1
A8> '
A9>
1 'o
A13>
KP12
6
A1
5
A2 7
4 A
A3
3
+> A4
14
S1
2
S2
10
B1
11
B2 9
12 B
+> B3
13
B4
1
oE1
15
oE2
KP11
4
00
7
01
9 (A14 ')
02 X
12 (A15 ')
03 X
Address A8-A13 is desirable to charge the keyboard buffer.
KP11 chip set in the controller 128 first memory (circuit
controller according to the magazine "hams. Your the computer.
"N5/97) line alternative memory connected in parallel with the
line fast memory, except the signal CS.
Then break the chain of fast signal CS
memory. The signal is fed to the eponymous
controller input, the line of fast memory serve CS1, a ruler
alternativnoyCS2. Ostalnoe Look for the scheme.
This scheme of course is not
panacea and can not get rid of 100%
all brakes. But all the programs earned on Turbo earned, and
with this devaysom and at the same time without the above bugs
with discharge programs, and playback otsifrovok.
