VERIFICATION SYSTEM PORT D62.
(C) Wild / oHgXXL
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Faulty system port can lead to incorrect sample rates of
memory page or screen, or incorrect sample ROM. Specific
problem is difficult to specify, so it is important to
carefully check out this site. It is composed of
circuits D61, D62, D63, D64.Proverka made without Z80 and ROM.
Recording information element D62 (555TM9)
made a positive difference of
Input D62 / 9. Verification of records
can be made as follows:
Connect to ground a conclusion D13/31
(A1) and D13 / 5 (A5). As a result, the element
D64 / 4 should receive a high potential.
Then connect to ground elements
D13/20 (IORQ) and D13/22 (WR). As a result,
D64/10 withdrawal appear high potential.
Under these conditions, Chip D63 / 8 should be
develop a low potential.
Since after the computer is its initial reset, then the D62 / 1
there is low potential, which sets all the outputs of D62 in
the zero state. Therefore, there is a low D62/15 potential,
which enters the D64/11 and Output D64/13 positive difference,
ringing on the element D64 / 9.
Thus, you can set, through
socket Z80, potential output circuits D62 and making a positive
difference at pin D62 / 9, write in any D62
information, controlling entry to the exit.
Pay attention to the last digit
Products D62/15. When writing 1 to this
discharge, the chip D64.4 can not create a positive difference
for recording information at the port of D62. A latch mode
SPECTRUM-48K.
Check chip D61. Apply a high
potential of the elements of D13 / 4 (A14) and D13 / 5
(A15). Then on the D63 / 6 The low potential for allowing
transmission of signals from element D62. At the same high
potential for D61 / 1 is transmitted signals A14, A15 from the
CPU. Check Signal through D61 - 555KP11 element.
Chip D63 / 4 and D63 / 1 produce the signals CAS for the first
and second line RAM. Check the transmission signal C33, C34,
C35 at the multiplexer D16-D19.
